Home
last modified time | relevance | path

Searched refs:XCHAL_INTLEVEL2_VECTOR_VADDR (Results 1 – 24 of 24) sorted by relevance

/openbmc/linux/arch/xtensa/include/asm/
H A Dvectors.h69 #undef XCHAL_INTLEVEL2_VECTOR_VADDR
83 #define INTLEVEL2_VECTOR_VADDR XCHAL_INTLEVEL2_VECTOR_VADDR
/openbmc/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
H A Dcore.h340 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0xD0000280 macro
343 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL2_VECTOR_VADDR
/openbmc/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h421 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0x40000010 macro
424 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL2_VECTOR_VADDR
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h412 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0xD0000280 macro
415 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL2_VECTOR_VADDR
/openbmc/qemu/tests/tcg/xtensa/
H A Dlinker.ld.S55 .vector.level2 XCHAL_INTLEVEL2_VECTOR_VADDR :
/openbmc/linux/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h312 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0xD0000240 macro
/openbmc/qemu/target/xtensa/core-fsf/
H A Dcore-isa.h314 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0xD0000240 macro
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h396 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0x5FFE057C macro
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dcore-isa.h361 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0xD0000180 macro
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h362 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0xD0000180 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h360 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0xD0000180 macro
/openbmc/qemu/target/xtensa/
H A Doverlay_tool.h205 XCHAL_INTLEVEL2_VECTOR_VADDR, \
552 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0 macro
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h411 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0x00002180 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h390 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0x00002180 macro
/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/
H A Dcore.h412 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0x00002180 macro
/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dcore.h452 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0x00002180 macro
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h516 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0x60000180 macro
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h495 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0x00002180 macro
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h494 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0x00002180 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h494 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0x60000180 macro
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h495 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0x00002180 macro
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h530 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0x60000180 macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h551 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0x40000180 macro
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h633 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0x00002180 macro