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Searched refs:XCHAL_INT10_LEVEL (Results 1 – 22 of 22) sorted by relevance

/openbmc/linux/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h218 #define XCHAL_INT10_LEVEL 1 macro
/openbmc/qemu/target/xtensa/core-fsf/
H A Dcore-isa.h220 #define XCHAL_INT10_LEVEL 1 macro
/openbmc/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
H A Dcore.h238 #define XCHAL_INT10_LEVEL 1 macro
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h291 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h304 #define XCHAL_INT10_LEVEL 1 macro
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dcore-isa.h224 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h225 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h297 #define XCHAL_INT10_LEVEL 1 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h223 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h272 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h251 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/
H A Dcore.h273 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dcore.h297 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h358 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h339 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h339 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h336 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h340 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h369 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h390 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h453 #define XCHAL_INT10_LEVEL 3 macro
/openbmc/qemu/target/xtensa/
H A Doverlay_tool.h612 #define XCHAL_INT10_LEVEL 0 macro