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Searched refs:XCHAL_DCACHE_WAYS (Results 1 – 25 of 25) sorted by relevance

/openbmc/linux/arch/xtensa/include/asm/
H A Dcache.h20 #define DCACHE_WAY_SIZE (XCHAL_DCACHE_SIZE/XCHAL_DCACHE_WAYS)
/openbmc/linux/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h148 #define XCHAL_DCACHE_WAYS 2 macro
/openbmc/qemu/target/xtensa/core-fsf/
H A Dcore-isa.h150 #define XCHAL_DCACHE_WAYS 2 macro
/openbmc/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
H A Dcore.h164 #define XCHAL_DCACHE_WAYS 2 macro
/openbmc/u-boot/arch/xtensa/include/asm/
H A Dcacheasm.h15 #define DCACHE_WAY_SIZE (XCHAL_DCACHE_SIZE/XCHAL_DCACHE_WAYS)
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h193 #define XCHAL_DCACHE_WAYS 2 macro
/openbmc/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h186 #define XCHAL_DCACHE_WAYS 1 macro
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dcore-isa.h154 #define XCHAL_DCACHE_WAYS 4 macro
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h155 #define XCHAL_DCACHE_WAYS 4 macro
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h219 #define XCHAL_DCACHE_WAYS 2 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h153 #define XCHAL_DCACHE_WAYS 4 macro
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h196 #define XCHAL_DCACHE_WAYS 4 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h175 #define XCHAL_DCACHE_WAYS 4 macro
/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/
H A Dcore.h197 #define XCHAL_DCACHE_WAYS 4 macro
/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dcore.h219 #define XCHAL_DCACHE_WAYS 4 macro
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h254 #define XCHAL_DCACHE_WAYS 2 macro
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h254 #define XCHAL_DCACHE_WAYS 4 macro
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h254 #define XCHAL_DCACHE_WAYS 4 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h232 #define XCHAL_DCACHE_WAYS 2 macro
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h255 #define XCHAL_DCACHE_WAYS 4 macro
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h266 #define XCHAL_DCACHE_WAYS 2 macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h284 #define XCHAL_DCACHE_WAYS 1 macro
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h363 #define XCHAL_DCACHE_WAYS 4 macro
/openbmc/linux/arch/xtensa/kernel/
H A Dsetup.c699 XCHAL_DCACHE_WAYS, in c_show()
/openbmc/qemu/target/xtensa/
H A Doverlay_tool.h472 .dcache_ways = XCHAL_DCACHE_WAYS, \