Searched refs:SHARED_FIELD_DP32 (Results 1 – 3 of 3) sorted by relevance
/openbmc/qemu/hw/gpio/ |
H A D | aspeed_gpio.c | 1024 value = SHARED_FIELD_DP32(value, GPIO_CONTROL_OUT_DATA, in aspeed_gpio_2700_read_control_reg() 1026 value = SHARED_FIELD_DP32(value, GPIO_CONTROL_DIRECTION, in aspeed_gpio_2700_read_control_reg() 1028 value = SHARED_FIELD_DP32(value, GPIO_CONTROL_INT_ENABLE, in aspeed_gpio_2700_read_control_reg() 1030 value = SHARED_FIELD_DP32(value, GPIO_CONTROL_INT_SENS_0, in aspeed_gpio_2700_read_control_reg() 1032 value = SHARED_FIELD_DP32(value, GPIO_CONTROL_INT_SENS_1, in aspeed_gpio_2700_read_control_reg() 1034 value = SHARED_FIELD_DP32(value, GPIO_CONTROL_INT_SENS_2, in aspeed_gpio_2700_read_control_reg() 1036 value = SHARED_FIELD_DP32(value, GPIO_CONTROL_RESET_TOLERANCE, in aspeed_gpio_2700_read_control_reg() 1038 value = SHARED_FIELD_DP32(value, GPIO_CONTROL_DEBOUNCE_1, in aspeed_gpio_2700_read_control_reg() 1040 value = SHARED_FIELD_DP32(value, GPIO_CONTROL_DEBOUNCE_2, in aspeed_gpio_2700_read_control_reg() 1042 value = SHARED_FIELD_DP32(value, GPIO_CONTROL_INPUT_MASK, in aspeed_gpio_2700_read_control_reg() [all …]
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/openbmc/qemu/include/hw/ |
H A D | registerfields.h | 205 #define SHARED_FIELD_DP32(storage, field, val) ({ \ macro 223 (regs)[(offset)] = SHARED_FIELD_DP32((regs)[(offset)], field, val);
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/openbmc/qemu/hw/i2c/ |
H A D | aspeed_i2c.c | 111 value = SHARED_FIELD_DP32(value, BUS_BUSY_STS, i2c_bus_busy(bus->bus)); in aspeed_i2c_bus_old_read() 172 value = SHARED_FIELD_DP32(value, BUS_BUSY_STS, i2c_bus_busy(bus->bus)); in aspeed_i2c_bus_new_read()
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