Searched refs:SCLK_RMII_SRC (Results 1 – 25 of 25) sorted by relevance
30 assigned-clocks = <&cru SCLK_RMII_SRC>;
277 assigned-clocks = <&cru SCLK_RMII_SRC>;
203 assigned-clocks = <&cru SCLK_RMII_SRC>;
190 assigned-clocks = <&cru SCLK_RMII_SRC>;
76 assigned-clocks = <&cru SCLK_RMII_SRC>;
155 assigned-clocks = <&cru SCLK_RMII_SRC>;
54 assigned-clocks = <&cru SCLK_RMII_SRC>;
139 assigned-clocks = <&cru SCLK_RMII_SRC>;
144 assigned-clocks = <&cru SCLK_RMII_SRC>;
287 assigned-clocks = <&cru SCLK_RMII_SRC>;
192 assigned-clocks = <&cru SCLK_RMII_SRC>;
157 assigned-clocks = <&cru SCLK_RMII_SRC>;
200 assigned-clocks = <&cru SCLK_RMII_SRC>;
176 assigned-clocks = <&cru SCLK_RMII_SRC>;
174 assigned-clocks = <&cru SCLK_RMII_SRC>;
253 assigned-clocks = <&cru SCLK_RMII_SRC>;
240 assigned-clocks = <&cru SCLK_RMII_SRC>;
275 assigned-clocks = <&cru SCLK_RMII_SRC>;
208 assigned-clocks = <&cru SCLK_RMII_SRC>;
299 assigned-clocks = <&cru SCLK_RMII_SRC>;
122 #define SCLK_RMII_SRC 166 macro
123 #define SCLK_RMII_SRC 166 macro
1053 case SCLK_RMII_SRC: in rk3399_clk_set_parent()
571 MUX(SCLK_RMII_SRC, "clk_rmii_src", mux_rmii_p, CLK_SET_RATE_PARENT,