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Searched refs:REG_FIELD (Results 1 – 25 of 63) sorted by relevance

123

/openbmc/linux/drivers/power/supply/
H A Dbd99954-charger.h482 [F_PREV_CHGSTM_STATE] = REG_FIELD(CHGSTM_STATUS, 8, 14),
483 [F_CHGSTM_STATE] = REG_FIELD(CHGSTM_STATUS, 0, 6),
484 [F_VBAT_VSYS_STATUS] = REG_FIELD(VBAT_VSYS_STATUS, 0, 15),
485 [F_VBUS_VCC_STATUS] = REG_FIELD(VBUS_VCC_STATUS, 0, 12),
486 [F_BATTEMP] = REG_FIELD(CHGOP_STATUS, 8, 10),
487 [F_VRECHG_DET] = REG_FIELD(CHGOP_STATUS, 6, 6),
488 [F_RBOOST_UV] = REG_FIELD(CHGOP_STATUS, 1, 1),
489 [F_RBOOSTS] = REG_FIELD(CHGOP_STATUS, 0, 0),
490 [F_THERMWDT_VAL] = REG_FIELD(WDT_STATUS, 8, 15),
491 [F_CHGWDT_VAL] = REG_FIELD(WDT_STATUS, 0, 7),
[all …]
H A Dbq25890_charger.c175 [F_EN_HIZ] = REG_FIELD(0x00, 7, 7),
176 [F_EN_ILIM] = REG_FIELD(0x00, 6, 6),
177 [F_IINLIM] = REG_FIELD(0x00, 0, 5),
179 [F_BHOT] = REG_FIELD(0x01, 6, 7),
180 [F_BCOLD] = REG_FIELD(0x01, 5, 5),
181 [F_VINDPM_OFS] = REG_FIELD(0x01, 0, 4),
183 [F_CONV_START] = REG_FIELD(0x02, 7, 7),
184 [F_CONV_RATE] = REG_FIELD(0x02, 6, 6),
185 [F_BOOSTF] = REG_FIELD(0x02, 5, 5),
186 [F_ICO_EN] = REG_FIELD(0x02, 4, 4),
[all …]
H A Drt9455_charger.c95 [F_STAT] = REG_FIELD(RT9455_REG_CTRL1, 4, 5),
96 [F_BOOST] = REG_FIELD(RT9455_REG_CTRL1, 3, 3),
97 [F_PWR_RDY] = REG_FIELD(RT9455_REG_CTRL1, 2, 2),
98 [F_OTG_PIN_POLARITY] = REG_FIELD(RT9455_REG_CTRL1, 1, 1),
100 [F_IAICR] = REG_FIELD(RT9455_REG_CTRL2, 6, 7),
101 [F_TE_SHDN_EN] = REG_FIELD(RT9455_REG_CTRL2, 5, 5),
102 [F_HIGHER_OCP] = REG_FIELD(RT9455_REG_CTRL2, 4, 4),
103 [F_TE] = REG_FIELD(RT9455_REG_CTRL2, 3, 3),
104 [F_IAICR_INT] = REG_FIELD(RT9455_REG_CTRL2, 2, 2),
105 [F_HIZ] = REG_FIELD(RT9455_REG_CTRL2, 1, 1),
[all …]
H A Dbq24257_charger.c128 [F_WD_FAULT] = REG_FIELD(BQ24257_REG_1, 7, 7),
129 [F_WD_EN] = REG_FIELD(BQ24257_REG_1, 6, 6),
130 [F_STAT] = REG_FIELD(BQ24257_REG_1, 4, 5),
131 [F_FAULT] = REG_FIELD(BQ24257_REG_1, 0, 3),
133 [F_RESET] = REG_FIELD(BQ24257_REG_2, 7, 7),
134 [F_IILIMIT] = REG_FIELD(BQ24257_REG_2, 4, 6),
135 [F_EN_STAT] = REG_FIELD(BQ24257_REG_2, 3, 3),
136 [F_EN_TERM] = REG_FIELD(BQ24257_REG_2, 2, 2),
137 [F_CE] = REG_FIELD(BQ24257_REG_2, 1, 1),
138 [F_HZ_MODE] = REG_FIELD(BQ24257_REG_2, 0, 0),
[all …]
/openbmc/linux/drivers/usb/isp1760/
H A Disp1760-core.c184 [HCS_PPC] = REG_FIELD(ISP176x_HC_HCSPARAMS, 4, 4),
185 [HCS_N_PORTS] = REG_FIELD(ISP176x_HC_HCSPARAMS, 0, 3),
186 [HCC_ISOC_CACHE] = REG_FIELD(ISP176x_HC_HCCPARAMS, 7, 7),
187 [HCC_ISOC_THRES] = REG_FIELD(ISP176x_HC_HCCPARAMS, 4, 6),
188 [CMD_LRESET] = REG_FIELD(ISP176x_HC_USBCMD, 7, 7),
189 [CMD_RESET] = REG_FIELD(ISP176x_HC_USBCMD, 1, 1),
190 [CMD_RUN] = REG_FIELD(ISP176x_HC_USBCMD, 0, 0),
191 [STS_PCD] = REG_FIELD(ISP176x_HC_USBSTS, 2, 2),
192 [HC_FRINDEX] = REG_FIELD(ISP176x_HC_FRINDEX, 0, 13),
193 [FLAG_CF] = REG_FIELD(ISP176x_HC_CONFIGFLAG, 0, 0),
[all …]
/openbmc/linux/drivers/thermal/qcom/
H A Dtsens.h89 [_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \
90 [_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \
91 [_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \
92 [_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \
93 [_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \
94 [_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \
95 [_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \
96 [_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \
97 [_name##_##8] = REG_FIELD(_offset + 32, _startbit, _stopbit), \
98 [_name##_##9] = REG_FIELD(_offset + 36, _startbit, _stopbit), \
[all …]
H A Dtsens-v1.c85 [VER_MAJOR] = REG_FIELD(SROT_HW_VER_OFF, 28, 31),
86 [VER_MINOR] = REG_FIELD(SROT_HW_VER_OFF, 16, 27),
87 [VER_STEP] = REG_FIELD(SROT_HW_VER_OFF, 0, 15),
89 [TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0),
90 [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1),
91 [SENSOR_EN] = REG_FIELD(SROT_CTRL_OFF, 3, 13),
95 [INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 0),
104 [LOW_INT_STATUS_0] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 0, 0),
105 [LOW_INT_STATUS_1] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 1, 1),
106 [LOW_INT_STATUS_2] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 2, 2),
[all …]
H A Dtsens-8960.c207 [TSENS_EN] = REG_FIELD(CNTL_ADDR, 0, 0),
208 [TSENS_SW_RST] = REG_FIELD(CNTL_ADDR, 1, 1),
210 [SENSOR_EN] = REG_FIELD(CNTL_ADDR, 3, 7),
217 [LOW_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 0, 7),
218 [UP_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 8, 15),
224 [CRIT_THRESH_1] = REG_FIELD(THRESHOLD_ADDR, 16, 23),
225 [CRIT_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 24, 31),
229 [LOW_INT_CLEAR_0] = REG_FIELD(CNTL_ADDR, 9, 9),
230 [UP_INT_CLEAR_0] = REG_FIELD(CNTL_ADDR, 10, 10),
235 [LAST_TEMP_0] = REG_FIELD(S0_STATUS_OFF, 0, 7),
[all …]
H A Dtsens-v2.c56 [VER_MAJOR] = REG_FIELD(SROT_HW_VER_OFF, 28, 31),
57 [VER_MINOR] = REG_FIELD(SROT_HW_VER_OFF, 16, 27),
58 [VER_STEP] = REG_FIELD(SROT_HW_VER_OFF, 0, 15),
60 [TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0),
61 [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1),
66 [INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 2),
85 [WDOG_BARK_STATUS] = REG_FIELD(TM_CRITICAL_INT_STATUS_OFF, 31, 31),
86 [WDOG_BARK_CLEAR] = REG_FIELD(TM_CRITICAL_INT_CLEAR_OFF, 31, 31),
87 [WDOG_BARK_MASK] = REG_FIELD(TM_CRITICAL_INT_MASK_OFF, 31, 31),
88 [CC_MON_STATUS] = REG_FIELD(TM_CRITICAL_INT_STATUS_OFF, 30, 30),
[all …]
/openbmc/linux/drivers/soc/qcom/
H A Dicc-bwmon.c197 [F_IRQ_STATUS] = REG_FIELD(BWMON_V4_IRQ_STATUS, 4, 7),
198 [F_IRQ_CLEAR] = REG_FIELD(BWMON_V4_IRQ_CLEAR, 4, 7),
199 [F_IRQ_ENABLE] = REG_FIELD(BWMON_V4_IRQ_ENABLE, 4, 7),
201 [F_ENABLE] = REG_FIELD(BWMON_V4_ENABLE, 0, 31),
202 [F_CLEAR] = REG_FIELD(BWMON_V4_CLEAR, 0, 1),
203 [F_SAMPLE_WINDOW] = REG_FIELD(BWMON_V4_SAMPLE_WINDOW, 0, 23),
204 [F_THRESHOLD_HIGH] = REG_FIELD(BWMON_V4_THRESHOLD_HIGH, 0, 11),
205 [F_THRESHOLD_MED] = REG_FIELD(BWMON_V4_THRESHOLD_MED, 0, 11),
206 [F_THRESHOLD_LOW] = REG_FIELD(BWMON_V4_THRESHOLD_LOW, 0, 11),
207 [F_ZONE_ACTIONS_ZONE0] = REG_FIELD(BWMON_V4_ZONE_ACTIONS, 0, 7),
[all …]
/openbmc/linux/sound/soc/qcom/
H A Dlpass-sc7180.c248 .sstream_en = REG_FIELD(0x6101c, 0, 0),
249 .dma_sel = REG_FIELD(0x6101c, 1, 2),
250 .auto_bbit_en = REG_FIELD(0x6101c, 3, 3),
251 .layout = REG_FIELD(0x6101c, 4, 4),
252 .layout_sp = REG_FIELD(0x6101c, 5, 8),
253 .set_sp_on_en = REG_FIELD(0x6101c, 10, 10),
254 .dp_audio = REG_FIELD(0x6101c, 11, 11),
255 .dp_staffing_en = REG_FIELD(0x6101c, 12, 12),
256 .dp_sp_b_hw_en = REG_FIELD(0x6101c, 13, 13),
258 .mute = REG_FIELD(0x610c8, 0, 0),
[all …]
H A Dlpass-sc7280.c380 .sstream_en = REG_FIELD(0x6101c, 0, 0),
381 .dma_sel = REG_FIELD(0x6101c, 1, 2),
382 .auto_bbit_en = REG_FIELD(0x6101c, 3, 3),
383 .layout = REG_FIELD(0x6101c, 4, 4),
384 .layout_sp = REG_FIELD(0x6101c, 5, 8),
385 .set_sp_on_en = REG_FIELD(0x6101c, 10, 10),
386 .dp_audio = REG_FIELD(0x6101c, 11, 11),
387 .dp_staffing_en = REG_FIELD(0x6101c, 12, 12),
388 .dp_sp_b_hw_en = REG_FIELD(0x6101c, 13, 13),
390 .mute = REG_FIELD(0x610c8, 0, 0),
[all …]
/openbmc/linux/drivers/iio/gyro/
H A Dfxas21002c_core.c46 [F_DR_STATUS] = REG_FIELD(FXAS21002C_REG_STATUS, 0, 7),
47 [F_OUT_X_MSB] = REG_FIELD(FXAS21002C_REG_OUT_X_MSB, 0, 7),
48 [F_OUT_X_LSB] = REG_FIELD(FXAS21002C_REG_OUT_X_LSB, 0, 7),
49 [F_OUT_Y_MSB] = REG_FIELD(FXAS21002C_REG_OUT_Y_MSB, 0, 7),
50 [F_OUT_Y_LSB] = REG_FIELD(FXAS21002C_REG_OUT_Y_LSB, 0, 7),
51 [F_OUT_Z_MSB] = REG_FIELD(FXAS21002C_REG_OUT_Z_MSB, 0, 7),
52 [F_OUT_Z_LSB] = REG_FIELD(FXAS21002C_REG_OUT_Z_LSB, 0, 7),
53 [F_ZYX_OW] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 7, 7),
54 [F_Z_OW] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 6, 6),
55 [F_Y_OW] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 5, 5),
[all …]
/openbmc/linux/drivers/gpu/drm/sun4i/
H A Dsun4i_hdmi_enc.c341 .ddc_clk_reg = REG_FIELD(SUN4I_HDMI_DDC_CLK_REG, 0, 6),
345 .field_ddc_en = REG_FIELD(SUN4I_HDMI_DDC_CTRL_REG, 31, 31),
346 .field_ddc_start = REG_FIELD(SUN4I_HDMI_DDC_CTRL_REG, 30, 30),
347 .field_ddc_reset = REG_FIELD(SUN4I_HDMI_DDC_CTRL_REG, 0, 0),
348 .field_ddc_addr_reg = REG_FIELD(SUN4I_HDMI_DDC_ADDR_REG, 0, 31),
349 .field_ddc_slave_addr = REG_FIELD(SUN4I_HDMI_DDC_ADDR_REG, 0, 6),
350 .field_ddc_int_status = REG_FIELD(SUN4I_HDMI_DDC_INT_STATUS_REG, 0, 8),
351 .field_ddc_fifo_clear = REG_FIELD(SUN4I_HDMI_DDC_FIFO_CTRL_REG, 31, 31),
352 .field_ddc_fifo_rx_thres = REG_FIELD(SUN4I_HDMI_DDC_FIFO_CTRL_REG, 4, 7),
353 .field_ddc_fifo_tx_thres = REG_FIELD(SUN4I_HDMI_DDC_FIFO_CTRL_REG, 0, 3),
[all …]
/openbmc/linux/drivers/net/ethernet/mscc/
H A Dvsc7514_regs.c13 [ANA_ADVLEARN_VLAN_CHK] = REG_FIELD(ANA_ADVLEARN, 11, 11),
14 [ANA_ADVLEARN_LEARN_MIRROR] = REG_FIELD(ANA_ADVLEARN, 0, 10),
15 [ANA_ANEVENTS_MSTI_DROP] = REG_FIELD(ANA_ANEVENTS, 27, 27),
16 [ANA_ANEVENTS_ACLKILL] = REG_FIELD(ANA_ANEVENTS, 26, 26),
17 [ANA_ANEVENTS_ACLUSED] = REG_FIELD(ANA_ANEVENTS, 25, 25),
18 [ANA_ANEVENTS_AUTOAGE] = REG_FIELD(ANA_ANEVENTS, 24, 24),
19 [ANA_ANEVENTS_VS2TTL1] = REG_FIELD(ANA_ANEVENTS, 23, 23),
20 [ANA_ANEVENTS_STORM_DROP] = REG_FIELD(ANA_ANEVENTS, 22, 22),
21 [ANA_ANEVENTS_LEARN_DROP] = REG_FIELD(ANA_ANEVENTS, 21, 21),
22 [ANA_ANEVENTS_AGED_ENTRY] = REG_FIELD(ANA_ANEVENTS, 20, 20),
[all …]
/openbmc/linux/drivers/regulator/
H A Dda9062-regulator.c378 .sleep = REG_FIELD(DA9062AA_VBUCK1_A,
382 .suspend_sleep = REG_FIELD(DA9062AA_VBUCK1_B,
387 .mode = REG_FIELD(DA9062AA_BUCK1_CFG,
391 .suspend = REG_FIELD(DA9062AA_BUCK1_CONT,
415 .sleep = REG_FIELD(DA9062AA_VBUCK3_A,
419 .suspend_sleep = REG_FIELD(DA9062AA_VBUCK3_B,
424 .mode = REG_FIELD(DA9062AA_BUCK3_CFG,
428 .suspend = REG_FIELD(DA9062AA_BUCK3_CONT,
452 .sleep = REG_FIELD(DA9062AA_VBUCK4_A,
456 .suspend_sleep = REG_FIELD(DA9062AA_VBUCK4_B,
[all …]
/openbmc/linux/drivers/iio/accel/
H A Dmsa311.c130 [F_SOFT_RESET_I2C] = REG_FIELD(MSA311_SOFT_RESET_REG, 2, 2),
131 [F_SOFT_RESET_SPI] = REG_FIELD(MSA311_SOFT_RESET_REG, 5, 5),
133 [F_ORIENT_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 6, 6),
134 [F_S_TAP_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 5, 5),
135 [F_D_TAP_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 4, 4),
136 [F_ACTIVE_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 2, 2),
137 [F_FREEFALL_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 0, 0),
139 [F_NEW_DATA_INT] = REG_FIELD(MSA311_DATA_INT_REG, 0, 0),
141 [F_TAP_SIGN] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 7, 7),
142 [F_TAP_FIRST_X] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 6, 6),
[all …]
/openbmc/linux/drivers/phy/ti/
H A Dphy-am654-serdes.c199 [CMU_PLL_CTRL] = REG_FIELD(CMU_R004, 8, 15),
200 [AHB_PMA_CM_VCO_VBIAS_VREG] = REG_FIELD(CMU_R060, 8, 15),
201 [CMU_MASTER_CDN] = REG_FIELD(CMU_R07C, 24, 31),
202 [AHB_PMA_CM_VCO_BIAS_VREG] = REG_FIELD(CMU_R088, 24, 31),
203 [AHB_PMA_CM_SR] = REG_FIELD(CMU_R0D0, 24, 31),
204 [AHB_SSC_GEN_Z_O_20_13] = REG_FIELD(CMU_R0E8, 8, 15),
205 [LANE_PLL_CTRL_RXEQ_RXIDLE] = REG_FIELD(LANE_R048, 8, 15),
206 [AHB_PMA_LN_AGC_THSEL_VREGH] = REG_FIELD(LANE_R058, 16, 23),
207 [AHB_PMA_LN_GEN3_AGC_SD_THSEL] = REG_FIELD(LANE_R06c, 0, 7),
208 [AHB_PMA_LN_RX_SELR_GEN3] = REG_FIELD(LANE_R070, 16, 23),
[all …]
H A Dphy-j721e-wiz.c87 static const struct reg_field por_en = REG_FIELD(WIZ_SERDES_CTRL, 31, 31);
88 static const struct reg_field phy_reset_n = REG_FIELD(WIZ_SERDES_RST, 31, 31);
89 static const struct reg_field phy_en_refclk = REG_FIELD(WIZ_SERDES_RST, 30, 30);
91 REG_FIELD(WIZ_SERDES_RST, 29, 29);
93 REG_FIELD(WIZ_SERDES_RST, 22, 23);
95 REG_FIELD(WIZ_SERDES_RST, 28, 28);
97 REG_FIELD(WIZ_SERDES_RST, 28, 29);
99 REG_FIELD(WIZ_SERDES_RST, 24, 25);
101 REG_FIELD(WIZ_SERDES_RST, 24, 24);
103 REG_FIELD(WIZ_SERDES_TOP_CTRL, 28, 29);
[all …]
H A Dphy-gmii-sel.c169 [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x650, 0, 1),
170 [PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0x650, 4, 4),
171 [PHY_GMII_SEL_RMII_IO_CLK_EN] = REG_FIELD(0x650, 6, 6),
174 [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x650, 2, 3),
175 [PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0x650, 5, 5),
176 [PHY_GMII_SEL_RMII_IO_CLK_EN] = REG_FIELD(0x650, 7, 7),
191 [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x554, 0, 1),
194 [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x554, 4, 5),
213 { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x0, 0, 2), },
214 { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x4, 0, 2), },
[all …]
/openbmc/linux/drivers/leds/rgb/
H A Dleds-mt6370-rgb.c160 [F_RGB_EN] = REG_FIELD(MT6370_REG_RGB_EN, 4, 7),
161 [F_CHGIND_EN] = REG_FIELD(MT6370_REG_RGB_CHRIND_DIM, 7, 7),
162 [F_LED1_CURR] = REG_FIELD(MT6370_REG_RGB1_ISNK, 0, 2),
163 [F_LED2_CURR] = REG_FIELD(MT6370_REG_RGB2_ISNK, 0, 2),
164 [F_LED3_CURR] = REG_FIELD(MT6370_REG_RGB3_ISNK, 0, 2),
165 [F_LED4_CURR] = REG_FIELD(MT6370_REG_RGB_CHRIND_CTRL, 0, 1),
166 [F_LED1_MODE] = REG_FIELD(MT6370_REG_RGB1_DIM, 5, 6),
167 [F_LED2_MODE] = REG_FIELD(MT6370_REG_RGB2_DIM, 5, 6),
168 [F_LED3_MODE] = REG_FIELD(MT6370_REG_RGB3_DIM, 5, 6),
169 [F_LED4_MODE] = REG_FIELD(MT6370_REG_RGB_CHRIND_DIM, 5, 6),
[all …]
/openbmc/linux/drivers/net/dsa/ocelot/
H A Dseville_vsc9953.c499 [ANA_ADVLEARN_VLAN_CHK] = REG_FIELD(ANA_ADVLEARN, 10, 10),
500 [ANA_ADVLEARN_LEARN_MIRROR] = REG_FIELD(ANA_ADVLEARN, 0, 9),
501 [ANA_ANEVENTS_AUTOAGE] = REG_FIELD(ANA_ANEVENTS, 24, 24),
502 [ANA_ANEVENTS_STORM_DROP] = REG_FIELD(ANA_ANEVENTS, 22, 22),
503 [ANA_ANEVENTS_LEARN_DROP] = REG_FIELD(ANA_ANEVENTS, 21, 21),
504 [ANA_ANEVENTS_AGED_ENTRY] = REG_FIELD(ANA_ANEVENTS, 20, 20),
505 [ANA_ANEVENTS_CPU_LEARN_FAILED] = REG_FIELD(ANA_ANEVENTS, 19, 19),
506 [ANA_ANEVENTS_AUTO_LEARN_FAILED] = REG_FIELD(ANA_ANEVENTS, 18, 18),
507 [ANA_ANEVENTS_LEARN_REMOVE] = REG_FIELD(ANA_ANEVENTS, 17, 17),
508 [ANA_ANEVENTS_AUTO_LEARNED] = REG_FIELD(ANA_ANEVENTS, 16, 16),
[all …]
/openbmc/linux/sound/soc/jz4740/
H A Djz4740-i2s.c363 .field_rx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 12, 15),
364 .field_tx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 8, 11),
365 .field_i2sdiv_capture = REG_FIELD(JZ_REG_AIC_CLK_DIV, 0, 3),
366 .field_i2sdiv_playback = REG_FIELD(JZ_REG_AIC_CLK_DIV, 0, 3),
372 .field_rx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 24, 27),
373 .field_tx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 16, 20),
374 .field_i2sdiv_capture = REG_FIELD(JZ_REG_AIC_CLK_DIV, 0, 3),
375 .field_i2sdiv_playback = REG_FIELD(JZ_REG_AIC_CLK_DIV, 0, 3),
380 .field_rx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 24, 27),
381 .field_tx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 16, 20),
[all …]
/openbmc/linux/drivers/rtc/
H A Drtc-ti-k3.c83 [K3RTC_KICK0] = REG_FIELD(REG_K3RTC_KICK0, 0, 31),
84 [K3RTC_KICK1] = REG_FIELD(REG_K3RTC_KICK1, 0, 31),
85 [K3RTC_S_CNT_LSW] = REG_FIELD(REG_K3RTC_S_CNT_LSW, 0, 31),
86 [K3RTC_S_CNT_MSW] = REG_FIELD(REG_K3RTC_S_CNT_MSW, 0, 15),
87 [K3RTC_O32K_OSC_DEP_EN] = REG_FIELD(REG_K3RTC_GENERAL_CTL, 21, 21),
88 [K3RTC_UNLOCK] = REG_FIELD(REG_K3RTC_GENERAL_CTL, 23, 23),
89 [K3RTC_CNT_FMODE] = REG_FIELD(REG_K3RTC_GENERAL_CTL, 24, 25),
90 [K3RTC_PEND] = REG_FIELD(REG_K3RTC_SYNCPEND, 0, 1),
91 [K3RTC_RELOAD_FROM_BBD] = REG_FIELD(REG_K3RTC_SYNCPEND, 31, 31),
92 [K3RTC_COMP] = REG_FIELD(REG_K3RTC_COMP, 0, 31),
[all …]
/openbmc/linux/drivers/gpu/drm/rockchip/
H A Drockchip_drm_vop2.c2486 [VOP2_WIN_ENABLE] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 0, 0),
2487 [VOP2_WIN_FORMAT] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 1, 5),
2488 [VOP2_WIN_RB_SWAP] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 14, 14),
2489 [VOP2_WIN_DITHER_UP] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 18, 18),
2490 [VOP2_WIN_ACT_INFO] = REG_FIELD(RK3568_CLUSTER_WIN_ACT_INFO, 0, 31),
2491 [VOP2_WIN_DSP_INFO] = REG_FIELD(RK3568_CLUSTER_WIN_DSP_INFO, 0, 31),
2492 [VOP2_WIN_DSP_ST] = REG_FIELD(RK3568_CLUSTER_WIN_DSP_ST, 0, 31),
2493 [VOP2_WIN_YRGB_MST] = REG_FIELD(RK3568_CLUSTER_WIN_YRGB_MST, 0, 31),
2494 [VOP2_WIN_UV_MST] = REG_FIELD(RK3568_CLUSTER_WIN_CBR_MST, 0, 31),
2495 [VOP2_WIN_YUV_CLIP] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 19, 19),
[all …]

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