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Searched refs:PPLL_RESET (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/drivers/video/
H A Dati_radeon_fb.c236 PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN, in radeon_write_pll_regs()
237 ~(PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN)); in radeon_write_pll_regs()
284 ~(PPLL_RESET | PPLL_SLEEP | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN)); in radeon_write_pll_regs()
/openbmc/linux/include/video/
H A Daty128.h265 #define PPLL_RESET 0x01 macro
H A Dradeon.h990 #define PPLL_RESET 0x00000001 macro
/openbmc/qemu/hw/display/
H A Dati_regs.h310 #define PPLL_RESET 0x00000001 macro
/openbmc/linux/drivers/video/fbdev/aty/
H A Dradeon_base.c1382 PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN, in radeon_write_pll_regs()
1383 ~(PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN)); in radeon_write_pll_regs()
1432 ~(PPLL_RESET | PPLL_SLEEP | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN)); in radeon_write_pll_regs()
H A Daty128fb.c1332 aty_ld_pll(PPLL_CNTL) | PPLL_RESET | PPLL_ATOMIC_UPDATE_EN); in aty128_set_pll()
1355 aty_st_pll(PPLL_CNTL, aty_ld_pll(PPLL_CNTL) & ~PPLL_RESET); in aty128_set_pll()
/openbmc/u-boot/include/
H A Dradeon.h986 #define PPLL_RESET 0x00000001 macro