1862b4a29SBALATON Zoltan /* 2862b4a29SBALATON Zoltan * ATI VGA register definitions 3862b4a29SBALATON Zoltan * 4862b4a29SBALATON Zoltan * based on: 5862b4a29SBALATON Zoltan * linux/include/video/aty128.h 6862b4a29SBALATON Zoltan * Register definitions for ATI Rage128 boards 7862b4a29SBALATON Zoltan * Anthony Tong <atong@uiuc.edu>, 1999 8862b4a29SBALATON Zoltan * Brad Douglas <brad@neruo.com>, 2000 9862b4a29SBALATON Zoltan * 10862b4a29SBALATON Zoltan * and linux/include/video/radeon.h 11862b4a29SBALATON Zoltan * 12862b4a29SBALATON Zoltan * This work is licensed under the GNU GPL license version 2. 13862b4a29SBALATON Zoltan */ 14862b4a29SBALATON Zoltan 15862b4a29SBALATON Zoltan /* 16862b4a29SBALATON Zoltan * Register mapping: 17862b4a29SBALATON Zoltan * 0x0000-0x00ff Misc regs also accessible via io and mmio space 18862b4a29SBALATON Zoltan * 0x0100-0x0eff Misc regs only accessible via mmio 19862b4a29SBALATON Zoltan * 0x0f00-0x0fff Read-only copy of PCI config regs 20862b4a29SBALATON Zoltan * 0x1000-0x13ff Concurrent Command Engine (CCE) regs 21862b4a29SBALATON Zoltan * 0x1400-0x1fff GUI (drawing engine) regs 22862b4a29SBALATON Zoltan */ 23862b4a29SBALATON Zoltan 24862b4a29SBALATON Zoltan #ifndef ATI_REGS_H 25862b4a29SBALATON Zoltan #define ATI_REGS_H 26862b4a29SBALATON Zoltan 27862b4a29SBALATON Zoltan #undef DEFAULT_PITCH /* needed for mingw builds */ 28862b4a29SBALATON Zoltan 29862b4a29SBALATON Zoltan #define MM_INDEX 0x0000 30862b4a29SBALATON Zoltan #define MM_DATA 0x0004 31862b4a29SBALATON Zoltan #define CLOCK_CNTL_INDEX 0x0008 32862b4a29SBALATON Zoltan #define CLOCK_CNTL_DATA 0x000c 33862b4a29SBALATON Zoltan #define BIOS_0_SCRATCH 0x0010 34862b4a29SBALATON Zoltan #define BUS_CNTL 0x0030 35862b4a29SBALATON Zoltan #define BUS_CNTL1 0x0034 36862b4a29SBALATON Zoltan #define GEN_INT_CNTL 0x0040 37b7105d28SBALATON Zoltan #define GEN_INT_STATUS 0x0044 38862b4a29SBALATON Zoltan #define CRTC_GEN_CNTL 0x0050 39862b4a29SBALATON Zoltan #define CRTC_EXT_CNTL 0x0054 40862b4a29SBALATON Zoltan #define DAC_CNTL 0x0058 41c82c7336SBALATON Zoltan #define GPIO_VGA_DDC 0x0060 42c82c7336SBALATON Zoltan #define GPIO_DVI_DDC 0x0064 43862b4a29SBALATON Zoltan #define GPIO_MONID 0x0068 44862b4a29SBALATON Zoltan #define I2C_CNTL_1 0x0094 45df1e4cf4SBALATON Zoltan #define AMCGPIO_MASK_MIR 0x009c 46df1e4cf4SBALATON Zoltan #define AMCGPIO_A_MIR 0x00a0 47df1e4cf4SBALATON Zoltan #define AMCGPIO_Y_MIR 0x00a4 48df1e4cf4SBALATON Zoltan #define AMCGPIO_EN_MIR 0x00a8 49862b4a29SBALATON Zoltan #define PALETTE_INDEX 0x00b0 50862b4a29SBALATON Zoltan #define PALETTE_DATA 0x00b4 51*bf9ac62aSBALATON Zoltan #define PALETTE_30_DATA 0x00b8 52862b4a29SBALATON Zoltan #define CNFG_CNTL 0x00e0 53862b4a29SBALATON Zoltan #define GEN_RESET_CNTL 0x00f0 54862b4a29SBALATON Zoltan #define CNFG_MEMSIZE 0x00f8 551d8d4d86SBALATON Zoltan #define CONFIG_APER_0_BASE 0x0100 561d8d4d86SBALATON Zoltan #define CONFIG_APER_1_BASE 0x0104 571d8d4d86SBALATON Zoltan #define CONFIG_APER_SIZE 0x0108 581d8d4d86SBALATON Zoltan #define CONFIG_REG_1_BASE 0x010c 591d8d4d86SBALATON Zoltan #define CONFIG_REG_APER_SIZE 0x0110 60f7ecde05SBALATON Zoltan #define HOST_PATH_CNTL 0x0130 61862b4a29SBALATON Zoltan #define MEM_CNTL 0x0140 62862b4a29SBALATON Zoltan #define MC_FB_LOCATION 0x0148 63862b4a29SBALATON Zoltan #define MC_AGP_LOCATION 0x014C 64862b4a29SBALATON Zoltan #define MC_STATUS 0x0150 652bbcaa7cSBALATON Zoltan #define MEM_SDRAM_MODE_REG 0x0158 66862b4a29SBALATON Zoltan #define MEM_POWER_MISC 0x015c 67862b4a29SBALATON Zoltan #define AGP_BASE 0x0170 68862b4a29SBALATON Zoltan #define AGP_CNTL 0x0174 69862b4a29SBALATON Zoltan #define AGP_APER_OFFSET 0x0178 70862b4a29SBALATON Zoltan #define PCI_GART_PAGE 0x017c 71862b4a29SBALATON Zoltan #define PC_NGUI_MODE 0x0180 72862b4a29SBALATON Zoltan #define PC_NGUI_CTLSTAT 0x0184 73862b4a29SBALATON Zoltan #define MPP_TB_CONFIG 0x01C0 74862b4a29SBALATON Zoltan #define MPP_GP_CONFIG 0x01C8 75862b4a29SBALATON Zoltan #define VIPH_CONTROL 0x01D0 76862b4a29SBALATON Zoltan #define CRTC_H_TOTAL_DISP 0x0200 77862b4a29SBALATON Zoltan #define CRTC_H_SYNC_STRT_WID 0x0204 78862b4a29SBALATON Zoltan #define CRTC_V_TOTAL_DISP 0x0208 79862b4a29SBALATON Zoltan #define CRTC_V_SYNC_STRT_WID 0x020c 80862b4a29SBALATON Zoltan #define CRTC_VLINE_CRNT_VLINE 0x0210 81862b4a29SBALATON Zoltan #define CRTC_CRNT_FRAME 0x0214 82862b4a29SBALATON Zoltan #define CRTC_GUI_TRIG_VLINE 0x0218 83862b4a29SBALATON Zoltan #define CRTC_OFFSET 0x0224 84862b4a29SBALATON Zoltan #define CRTC_OFFSET_CNTL 0x0228 85862b4a29SBALATON Zoltan #define CRTC_PITCH 0x022c 86862b4a29SBALATON Zoltan #define OVR_CLR 0x0230 87862b4a29SBALATON Zoltan #define OVR_WID_LEFT_RIGHT 0x0234 88862b4a29SBALATON Zoltan #define OVR_WID_TOP_BOTTOM 0x0238 89862b4a29SBALATON Zoltan #define CUR_OFFSET 0x0260 90862b4a29SBALATON Zoltan #define CUR_HORZ_VERT_POSN 0x0264 91862b4a29SBALATON Zoltan #define CUR_HORZ_VERT_OFF 0x0268 92862b4a29SBALATON Zoltan #define CUR_CLR0 0x026c 93862b4a29SBALATON Zoltan #define CUR_CLR1 0x0270 94862b4a29SBALATON Zoltan #define LVDS_GEN_CNTL 0x02d0 95862b4a29SBALATON Zoltan #define DDA_CONFIG 0x02e0 96862b4a29SBALATON Zoltan #define DDA_ON_OFF 0x02e4 97862b4a29SBALATON Zoltan #define VGA_DDA_CONFIG 0x02e8 98862b4a29SBALATON Zoltan #define VGA_DDA_ON_OFF 0x02ec 99862b4a29SBALATON Zoltan #define CRTC2_H_TOTAL_DISP 0x0300 100862b4a29SBALATON Zoltan #define CRTC2_H_SYNC_STRT_WID 0x0304 101862b4a29SBALATON Zoltan #define CRTC2_V_TOTAL_DISP 0x0308 102862b4a29SBALATON Zoltan #define CRTC2_V_SYNC_STRT_WID 0x030c 103862b4a29SBALATON Zoltan #define CRTC2_VLINE_CRNT_VLINE 0x0310 104862b4a29SBALATON Zoltan #define CRTC2_CRNT_FRAME 0x0314 105862b4a29SBALATON Zoltan #define CRTC2_GUI_TRIG_VLINE 0x0318 106862b4a29SBALATON Zoltan #define CRTC2_OFFSET 0x0324 107862b4a29SBALATON Zoltan #define CRTC2_OFFSET_CNTL 0x0328 108862b4a29SBALATON Zoltan #define CRTC2_PITCH 0x032c 109862b4a29SBALATON Zoltan #define DDA2_CONFIG 0x03e0 110862b4a29SBALATON Zoltan #define DDA2_ON_OFF 0x03e4 111862b4a29SBALATON Zoltan #define CRTC2_GEN_CNTL 0x03f8 112862b4a29SBALATON Zoltan #define CRTC2_STATUS 0x03fc 113862b4a29SBALATON Zoltan #define OV0_SCALE_CNTL 0x0420 114862b4a29SBALATON Zoltan #define SUBPIC_CNTL 0x0540 115862b4a29SBALATON Zoltan #define PM4_BUFFER_OFFSET 0x0700 116862b4a29SBALATON Zoltan #define PM4_BUFFER_CNTL 0x0704 117862b4a29SBALATON Zoltan #define PM4_BUFFER_WM_CNTL 0x0708 118862b4a29SBALATON Zoltan #define PM4_BUFFER_DL_RPTR_ADDR 0x070c 119862b4a29SBALATON Zoltan #define PM4_BUFFER_DL_RPTR 0x0710 120862b4a29SBALATON Zoltan #define PM4_BUFFER_DL_WPTR 0x0714 121862b4a29SBALATON Zoltan #define PM4_VC_FPU_SETUP 0x071c 122862b4a29SBALATON Zoltan #define PM4_FPU_CNTL 0x0720 123862b4a29SBALATON Zoltan #define PM4_VC_FORMAT 0x0724 124862b4a29SBALATON Zoltan #define PM4_VC_CNTL 0x0728 125862b4a29SBALATON Zoltan #define PM4_VC_I01 0x072c 126862b4a29SBALATON Zoltan #define PM4_VC_VLOFF 0x0730 127862b4a29SBALATON Zoltan #define PM4_VC_VLSIZE 0x0734 128862b4a29SBALATON Zoltan #define PM4_IW_INDOFF 0x0738 129862b4a29SBALATON Zoltan #define PM4_IW_INDSIZE 0x073c 130862b4a29SBALATON Zoltan #define PM4_FPU_FPX0 0x0740 131862b4a29SBALATON Zoltan #define PM4_FPU_FPY0 0x0744 132862b4a29SBALATON Zoltan #define PM4_FPU_FPX1 0x0748 133862b4a29SBALATON Zoltan #define PM4_FPU_FPY1 0x074c 134862b4a29SBALATON Zoltan #define PM4_FPU_FPX2 0x0750 135862b4a29SBALATON Zoltan #define PM4_FPU_FPY2 0x0754 136862b4a29SBALATON Zoltan #define PM4_FPU_FPY3 0x0758 137862b4a29SBALATON Zoltan #define PM4_FPU_FPY4 0x075c 138862b4a29SBALATON Zoltan #define PM4_FPU_FPY5 0x0760 139862b4a29SBALATON Zoltan #define PM4_FPU_FPY6 0x0764 140862b4a29SBALATON Zoltan #define PM4_FPU_FPR 0x0768 141862b4a29SBALATON Zoltan #define PM4_FPU_FPG 0x076c 142862b4a29SBALATON Zoltan #define PM4_FPU_FPB 0x0770 143862b4a29SBALATON Zoltan #define PM4_FPU_FPA 0x0774 144862b4a29SBALATON Zoltan #define PM4_FPU_INTXY0 0x0780 145862b4a29SBALATON Zoltan #define PM4_FPU_INTXY1 0x0784 146862b4a29SBALATON Zoltan #define PM4_FPU_INTXY2 0x0788 147862b4a29SBALATON Zoltan #define PM4_FPU_INTARGB 0x078c 148862b4a29SBALATON Zoltan #define PM4_FPU_FPTWICEAREA 0x0790 149862b4a29SBALATON Zoltan #define PM4_FPU_DMAJOR01 0x0794 150862b4a29SBALATON Zoltan #define PM4_FPU_DMAJOR12 0x0798 151862b4a29SBALATON Zoltan #define PM4_FPU_DMAJOR02 0x079c 152862b4a29SBALATON Zoltan #define PM4_FPU_STAT 0x07a0 153862b4a29SBALATON Zoltan #define PM4_STAT 0x07b8 154862b4a29SBALATON Zoltan #define PM4_TEST_CNTL 0x07d0 155862b4a29SBALATON Zoltan #define PM4_MICROCODE_ADDR 0x07d4 156862b4a29SBALATON Zoltan #define PM4_MICROCODE_RADDR 0x07d8 157862b4a29SBALATON Zoltan #define PM4_MICROCODE_DATAH 0x07dc 158862b4a29SBALATON Zoltan #define PM4_MICROCODE_DATAL 0x07e0 159862b4a29SBALATON Zoltan #define PM4_CMDFIFO_ADDR 0x07e4 160862b4a29SBALATON Zoltan #define PM4_CMDFIFO_DATAH 0x07e8 161862b4a29SBALATON Zoltan #define PM4_CMDFIFO_DATAL 0x07ec 162862b4a29SBALATON Zoltan #define PM4_BUFFER_ADDR 0x07f0 163862b4a29SBALATON Zoltan #define PM4_BUFFER_DATAH 0x07f4 164862b4a29SBALATON Zoltan #define PM4_BUFFER_DATAL 0x07f8 165862b4a29SBALATON Zoltan #define PM4_MICRO_CNTL 0x07fc 166862b4a29SBALATON Zoltan #define CAP0_TRIG_CNTL 0x0950 167862b4a29SBALATON Zoltan #define CAP1_TRIG_CNTL 0x09c0 168862b4a29SBALATON Zoltan 169862b4a29SBALATON Zoltan #define RBBM_STATUS 0x0e40 170862b4a29SBALATON Zoltan 171862b4a29SBALATON Zoltan /* 172862b4a29SBALATON Zoltan * GUI Block Memory Mapped Registers 173862b4a29SBALATON Zoltan * These registers are FIFOed. 174862b4a29SBALATON Zoltan */ 175862b4a29SBALATON Zoltan #define PM4_FIFO_DATA_EVEN 0x1000 176862b4a29SBALATON Zoltan #define PM4_FIFO_DATA_ODD 0x1004 177862b4a29SBALATON Zoltan 178862b4a29SBALATON Zoltan #define DST_OFFSET 0x1404 179862b4a29SBALATON Zoltan #define DST_PITCH 0x1408 180862b4a29SBALATON Zoltan #define DST_WIDTH 0x140c 181862b4a29SBALATON Zoltan #define DST_HEIGHT 0x1410 182862b4a29SBALATON Zoltan #define SRC_X 0x1414 183862b4a29SBALATON Zoltan #define SRC_Y 0x1418 184862b4a29SBALATON Zoltan #define DST_X 0x141c 185862b4a29SBALATON Zoltan #define DST_Y 0x1420 186862b4a29SBALATON Zoltan #define SRC_PITCH_OFFSET 0x1428 187862b4a29SBALATON Zoltan #define DST_PITCH_OFFSET 0x142c 188862b4a29SBALATON Zoltan #define SRC_Y_X 0x1434 189862b4a29SBALATON Zoltan #define DST_Y_X 0x1438 190862b4a29SBALATON Zoltan #define DST_HEIGHT_WIDTH 0x143c 191862b4a29SBALATON Zoltan #define DP_GUI_MASTER_CNTL 0x146c 192862b4a29SBALATON Zoltan #define BRUSH_SCALE 0x1470 193862b4a29SBALATON Zoltan #define BRUSH_Y_X 0x1474 194862b4a29SBALATON Zoltan #define DP_BRUSH_BKGD_CLR 0x1478 195862b4a29SBALATON Zoltan #define DP_BRUSH_FRGD_CLR 0x147c 196862b4a29SBALATON Zoltan #define DST_WIDTH_X 0x1588 197862b4a29SBALATON Zoltan #define DST_HEIGHT_WIDTH_8 0x158c 198862b4a29SBALATON Zoltan #define SRC_X_Y 0x1590 199862b4a29SBALATON Zoltan #define DST_X_Y 0x1594 200862b4a29SBALATON Zoltan #define DST_WIDTH_HEIGHT 0x1598 201862b4a29SBALATON Zoltan #define DST_WIDTH_X_INCY 0x159c 202862b4a29SBALATON Zoltan #define DST_HEIGHT_Y 0x15a0 203862b4a29SBALATON Zoltan #define DST_X_SUB 0x15a4 204862b4a29SBALATON Zoltan #define DST_Y_SUB 0x15a8 205862b4a29SBALATON Zoltan #define SRC_OFFSET 0x15ac 206862b4a29SBALATON Zoltan #define SRC_PITCH 0x15b0 207862b4a29SBALATON Zoltan #define DST_HEIGHT_WIDTH_BW 0x15b4 208862b4a29SBALATON Zoltan #define CLR_CMP_CNTL 0x15c0 209862b4a29SBALATON Zoltan #define CLR_CMP_CLR_SRC 0x15c4 210862b4a29SBALATON Zoltan #define CLR_CMP_CLR_DST 0x15c8 211862b4a29SBALATON Zoltan #define CLR_CMP_MASK 0x15cc 212862b4a29SBALATON Zoltan #define DP_SRC_FRGD_CLR 0x15d8 213862b4a29SBALATON Zoltan #define DP_SRC_BKGD_CLR 0x15dc 214862b4a29SBALATON Zoltan #define DST_BRES_ERR 0x1628 215862b4a29SBALATON Zoltan #define DST_BRES_INC 0x162c 216862b4a29SBALATON Zoltan #define DST_BRES_DEC 0x1630 217862b4a29SBALATON Zoltan #define DST_BRES_LNTH 0x1634 218862b4a29SBALATON Zoltan #define DST_BRES_LNTH_SUB 0x1638 219862b4a29SBALATON Zoltan #define SC_LEFT 0x1640 220862b4a29SBALATON Zoltan #define SC_RIGHT 0x1644 221862b4a29SBALATON Zoltan #define SC_TOP 0x1648 222862b4a29SBALATON Zoltan #define SC_BOTTOM 0x164c 223862b4a29SBALATON Zoltan #define SRC_SC_RIGHT 0x1654 224862b4a29SBALATON Zoltan #define SRC_SC_BOTTOM 0x165c 225862b4a29SBALATON Zoltan #define GUI_DEBUG0 0x16a0 226862b4a29SBALATON Zoltan #define GUI_DEBUG1 0x16a4 227862b4a29SBALATON Zoltan #define GUI_TIMEOUT 0x16b0 228862b4a29SBALATON Zoltan #define GUI_TIMEOUT0 0x16b4 229862b4a29SBALATON Zoltan #define GUI_TIMEOUT1 0x16b8 230862b4a29SBALATON Zoltan #define GUI_PROBE 0x16bc 231862b4a29SBALATON Zoltan #define DP_CNTL 0x16c0 232862b4a29SBALATON Zoltan #define DP_DATATYPE 0x16c4 233862b4a29SBALATON Zoltan #define DP_MIX 0x16c8 234862b4a29SBALATON Zoltan #define DP_WRITE_MASK 0x16cc 235862b4a29SBALATON Zoltan #define DP_CNTL_XDIR_YDIR_YMAJOR 0x16d0 236862b4a29SBALATON Zoltan #define DEFAULT_OFFSET 0x16e0 237862b4a29SBALATON Zoltan #define DEFAULT_PITCH 0x16e4 238862b4a29SBALATON Zoltan #define DEFAULT_SC_BOTTOM_RIGHT 0x16e8 239862b4a29SBALATON Zoltan #define SC_TOP_LEFT 0x16ec 240862b4a29SBALATON Zoltan #define SC_BOTTOM_RIGHT 0x16f0 241862b4a29SBALATON Zoltan #define SRC_SC_BOTTOM_RIGHT 0x16f4 242862b4a29SBALATON Zoltan #define DST_TILE 0x1700 243862b4a29SBALATON Zoltan #define WAIT_UNTIL 0x1720 244862b4a29SBALATON Zoltan #define CACHE_CNTL 0x1724 245862b4a29SBALATON Zoltan #define GUI_STAT 0x1740 246862b4a29SBALATON Zoltan #define PC_GUI_MODE 0x1744 247862b4a29SBALATON Zoltan #define PC_GUI_CTLSTAT 0x1748 248862b4a29SBALATON Zoltan #define PC_DEBUG_MODE 0x1760 249862b4a29SBALATON Zoltan #define BRES_DST_ERR_DEC 0x1780 250862b4a29SBALATON Zoltan #define TRAIL_BRES_T12_ERR_DEC 0x1784 251862b4a29SBALATON Zoltan #define TRAIL_BRES_T12_INC 0x1788 252862b4a29SBALATON Zoltan #define DP_T12_CNTL 0x178c 253862b4a29SBALATON Zoltan #define DST_BRES_T1_LNTH 0x1790 254862b4a29SBALATON Zoltan #define DST_BRES_T2_LNTH 0x1794 255862b4a29SBALATON Zoltan #define SCALE_SRC_HEIGHT_WIDTH 0x1994 256862b4a29SBALATON Zoltan #define SCALE_OFFSET_0 0x1998 257862b4a29SBALATON Zoltan #define SCALE_PITCH 0x199c 258862b4a29SBALATON Zoltan #define SCALE_X_INC 0x19a0 259862b4a29SBALATON Zoltan #define SCALE_Y_INC 0x19a4 260862b4a29SBALATON Zoltan #define SCALE_HACC 0x19a8 261862b4a29SBALATON Zoltan #define SCALE_VACC 0x19ac 262862b4a29SBALATON Zoltan #define SCALE_DST_X_Y 0x19b0 263862b4a29SBALATON Zoltan #define SCALE_DST_HEIGHT_WIDTH 0x19b4 264862b4a29SBALATON Zoltan #define SCALE_3D_CNTL 0x1a00 265862b4a29SBALATON Zoltan #define SCALE_3D_DATATYPE 0x1a20 266862b4a29SBALATON Zoltan #define SETUP_CNTL 0x1bc4 267862b4a29SBALATON Zoltan #define SOLID_COLOR 0x1bc8 268862b4a29SBALATON Zoltan #define WINDOW_XY_OFFSET 0x1bcc 269862b4a29SBALATON Zoltan #define DRAW_LINE_POINT 0x1bd0 270862b4a29SBALATON Zoltan #define SETUP_CNTL_PM4 0x1bd4 271862b4a29SBALATON Zoltan #define DST_PITCH_OFFSET_C 0x1c80 272862b4a29SBALATON Zoltan #define DP_GUI_MASTER_CNTL_C 0x1c84 273862b4a29SBALATON Zoltan #define SC_TOP_LEFT_C 0x1c88 274862b4a29SBALATON Zoltan #define SC_BOTTOM_RIGHT_C 0x1c8c 275862b4a29SBALATON Zoltan 276862b4a29SBALATON Zoltan #define CLR_CMP_MASK_3D 0x1A28 277862b4a29SBALATON Zoltan #define MISC_3D_STATE_CNTL_REG 0x1CA0 278862b4a29SBALATON Zoltan #define MC_SRC1_CNTL 0x19D8 279862b4a29SBALATON Zoltan #define TEX_CNTL 0x1800 280862b4a29SBALATON Zoltan 281862b4a29SBALATON Zoltan /* CONSTANTS */ 282862b4a29SBALATON Zoltan #define GUI_ACTIVE 0x80000000 283862b4a29SBALATON Zoltan #define ENGINE_IDLE 0x0 284862b4a29SBALATON Zoltan 285862b4a29SBALATON Zoltan #define PLL_WR_EN 0x00000080 286862b4a29SBALATON Zoltan 287862b4a29SBALATON Zoltan #define CLK_PIN_CNTL 0x01 288862b4a29SBALATON Zoltan #define PPLL_CNTL 0x02 289862b4a29SBALATON Zoltan #define PPLL_REF_DIV 0x03 290862b4a29SBALATON Zoltan #define PPLL_DIV_0 0x04 291862b4a29SBALATON Zoltan #define PPLL_DIV_1 0x05 292862b4a29SBALATON Zoltan #define PPLL_DIV_2 0x06 293862b4a29SBALATON Zoltan #define PPLL_DIV_3 0x07 294862b4a29SBALATON Zoltan #define VCLK_ECP_CNTL 0x08 295862b4a29SBALATON Zoltan #define HTOTAL_CNTL 0x09 296862b4a29SBALATON Zoltan #define X_MPLL_REF_FB_DIV 0x0a 297862b4a29SBALATON Zoltan #define XPLL_CNTL 0x0b 298862b4a29SBALATON Zoltan #define XDLL_CNTL 0x0c 299862b4a29SBALATON Zoltan #define XCLK_CNTL 0x0d 300862b4a29SBALATON Zoltan #define MPLL_CNTL 0x0e 301862b4a29SBALATON Zoltan #define MCLK_CNTL 0x0f 302862b4a29SBALATON Zoltan #define AGP_PLL_CNTL 0x10 303862b4a29SBALATON Zoltan #define FCP_CNTL 0x12 304862b4a29SBALATON Zoltan #define PLL_TEST_CNTL 0x13 305862b4a29SBALATON Zoltan #define P2PLL_CNTL 0x2a 306862b4a29SBALATON Zoltan #define P2PLL_REF_DIV 0x2b 307862b4a29SBALATON Zoltan #define P2PLL_DIV_0 0x2b 308862b4a29SBALATON Zoltan #define POWER_MANAGEMENT 0x2f 309862b4a29SBALATON Zoltan 310862b4a29SBALATON Zoltan #define PPLL_RESET 0x00000001 311862b4a29SBALATON Zoltan #define PPLL_ATOMIC_UPDATE_EN 0x00010000 312862b4a29SBALATON Zoltan #define PPLL_VGA_ATOMIC_UPDATE_EN 0x00020000 313862b4a29SBALATON Zoltan #define PPLL_REF_DIV_MASK 0x000003FF 314862b4a29SBALATON Zoltan #define PPLL_FB3_DIV_MASK 0x000007FF 315862b4a29SBALATON Zoltan #define PPLL_POST3_DIV_MASK 0x00070000 316862b4a29SBALATON Zoltan #define PPLL_ATOMIC_UPDATE_R 0x00008000 317862b4a29SBALATON Zoltan #define PPLL_ATOMIC_UPDATE_W 0x00008000 318862b4a29SBALATON Zoltan #define MEM_CFG_TYPE_MASK 0x00000003 319862b4a29SBALATON Zoltan #define XCLK_SRC_SEL_MASK 0x00000007 320862b4a29SBALATON Zoltan #define XPLL_FB_DIV_MASK 0x0000FF00 321862b4a29SBALATON Zoltan #define X_MPLL_REF_DIV_MASK 0x000000FF 322862b4a29SBALATON Zoltan 323b7105d28SBALATON Zoltan /* GEN_INT_CNTL) */ 324b7105d28SBALATON Zoltan #define CRTC_VBLANK_INT 0x00000001 325b7105d28SBALATON Zoltan #define CRTC_VLINE_INT 0x00000002 326b7105d28SBALATON Zoltan #define CRTC_VSYNC_INT 0x00000004 327b7105d28SBALATON Zoltan 328862b4a29SBALATON Zoltan /* Config control values (CONFIG_CNTL) */ 3298bb9a2b2SBALATON Zoltan #define APER_0_ENDIAN 0x00000003 3308bb9a2b2SBALATON Zoltan #define APER_1_ENDIAN 0x0000000c 331862b4a29SBALATON Zoltan #define CFG_VGA_IO_DIS 0x00000400 332862b4a29SBALATON Zoltan 333862b4a29SBALATON Zoltan /* CRTC control values (CRTC_GEN_CNTL) */ 334862b4a29SBALATON Zoltan #define CRTC_CSYNC_EN 0x00000010 335862b4a29SBALATON Zoltan 336862b4a29SBALATON Zoltan #define CRTC2_DBL_SCAN_EN 0x00000001 337862b4a29SBALATON Zoltan #define CRTC2_DISPLAY_DIS 0x00800000 338862b4a29SBALATON Zoltan #define CRTC2_FIFO_EXTSENSE 0x00200000 339862b4a29SBALATON Zoltan #define CRTC2_ICON_EN 0x00100000 340862b4a29SBALATON Zoltan #define CRTC2_CUR_EN 0x00010000 341862b4a29SBALATON Zoltan #define CRTC2_EXT_DISP_EN 0x01000000 342862b4a29SBALATON Zoltan #define CRTC2_EN 0x02000000 343862b4a29SBALATON Zoltan #define CRTC2_DISP_REQ_EN_B 0x04000000 344862b4a29SBALATON Zoltan 345862b4a29SBALATON Zoltan #define CRTC_PIX_WIDTH_MASK 0x00000700 346862b4a29SBALATON Zoltan #define CRTC_PIX_WIDTH_4BPP 0x00000100 347862b4a29SBALATON Zoltan #define CRTC_PIX_WIDTH_8BPP 0x00000200 348862b4a29SBALATON Zoltan #define CRTC_PIX_WIDTH_15BPP 0x00000300 349862b4a29SBALATON Zoltan #define CRTC_PIX_WIDTH_16BPP 0x00000400 350862b4a29SBALATON Zoltan #define CRTC_PIX_WIDTH_24BPP 0x00000500 351862b4a29SBALATON Zoltan #define CRTC_PIX_WIDTH_32BPP 0x00000600 352862b4a29SBALATON Zoltan 353862b4a29SBALATON Zoltan /* DAC_CNTL bit constants */ 354862b4a29SBALATON Zoltan #define DAC_8BIT_EN 0x00000100 355862b4a29SBALATON Zoltan #define DAC_MASK 0xFF000000 356862b4a29SBALATON Zoltan #define DAC_BLANKING 0x00000004 357862b4a29SBALATON Zoltan #define DAC_RANGE_CNTL 0x00000003 358862b4a29SBALATON Zoltan #define DAC_CLK_SEL 0x00000010 359862b4a29SBALATON Zoltan #define DAC_PALETTE_ACCESS_CNTL 0x00000020 360862b4a29SBALATON Zoltan #define DAC_PALETTE2_SNOOP_EN 0x00000040 361862b4a29SBALATON Zoltan #define DAC_PDWN 0x00008000 362862b4a29SBALATON Zoltan 363862b4a29SBALATON Zoltan /* CRTC_EXT_CNTL */ 364862b4a29SBALATON Zoltan #define CRT_CRTC_DISPLAY_DIS 0x00000400 365862b4a29SBALATON Zoltan #define CRT_CRTC_ON 0x00008000 366862b4a29SBALATON Zoltan 367862b4a29SBALATON Zoltan /* GEN_RESET_CNTL bit constants */ 368862b4a29SBALATON Zoltan #define SOFT_RESET_GUI 0x00000001 369862b4a29SBALATON Zoltan #define SOFT_RESET_VCLK 0x00000100 370862b4a29SBALATON Zoltan #define SOFT_RESET_PCLK 0x00000200 371862b4a29SBALATON Zoltan #define SOFT_RESET_ECP 0x00000400 372862b4a29SBALATON Zoltan #define SOFT_RESET_DISPENG_XCLK 0x00000800 373862b4a29SBALATON Zoltan 374862b4a29SBALATON Zoltan /* PC_GUI_CTLSTAT bit constants */ 375862b4a29SBALATON Zoltan #define PC_BUSY_INIT 0x10000000 376862b4a29SBALATON Zoltan #define PC_BUSY_GUI 0x20000000 377862b4a29SBALATON Zoltan #define PC_BUSY_NGUI 0x40000000 378862b4a29SBALATON Zoltan #define PC_BUSY 0x80000000 379862b4a29SBALATON Zoltan 380862b4a29SBALATON Zoltan #define BUS_MASTER_DIS 0x00000040 381862b4a29SBALATON Zoltan #define PM4_BUFFER_CNTL_NONPM4 0x00000000 382862b4a29SBALATON Zoltan 383862b4a29SBALATON Zoltan /* DP_DATATYPE bit constants */ 384862b4a29SBALATON Zoltan #define DST_8BPP 0x00000002 385862b4a29SBALATON Zoltan #define DST_15BPP 0x00000003 386862b4a29SBALATON Zoltan #define DST_16BPP 0x00000004 387862b4a29SBALATON Zoltan #define DST_24BPP 0x00000005 388862b4a29SBALATON Zoltan #define DST_32BPP 0x00000006 389862b4a29SBALATON Zoltan 390862b4a29SBALATON Zoltan #define BRUSH_SOLIDCOLOR 0x00000d00 391862b4a29SBALATON Zoltan 392862b4a29SBALATON Zoltan /* DP_GUI_MASTER_CNTL bit constants */ 393866ad5f5SBALATON Zoltan #define GMC_SRC_PITCH_OFFSET_CNTL 0x00000001 394866ad5f5SBALATON Zoltan #define GMC_DST_PITCH_OFFSET_CNTL 0x00000002 395862b4a29SBALATON Zoltan #define GMC_SRC_CLIP_DEFAULT 0x00000000 396862b4a29SBALATON Zoltan #define GMC_DST_CLIP_DEFAULT 0x00000000 397862b4a29SBALATON Zoltan #define GMC_BRUSH_SOLIDCOLOR 0x000000d0 398862b4a29SBALATON Zoltan #define GMC_SRC_DSTCOLOR 0x00003000 399862b4a29SBALATON Zoltan #define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000 400862b4a29SBALATON Zoltan #define GMC_DP_SRC_RECT 0x02000000 401862b4a29SBALATON Zoltan #define GMC_3D_FCN_EN_CLR 0x00000000 402862b4a29SBALATON Zoltan #define GMC_AUX_CLIP_CLEAR 0x20000000 403862b4a29SBALATON Zoltan #define GMC_DST_CLR_CMP_FCN_CLEAR 0x10000000 404862b4a29SBALATON Zoltan #define GMC_WRITE_MASK_SET 0x40000000 405862b4a29SBALATON Zoltan #define GMC_DP_CONVERSION_TEMP_6500 0x00000000 406862b4a29SBALATON Zoltan 407862b4a29SBALATON Zoltan /* DP_GUI_MASTER_CNTL ROP3 named constants */ 408862b4a29SBALATON Zoltan #define GMC_ROP3_MASK 0x00ff0000 409862b4a29SBALATON Zoltan #define ROP3_BLACKNESS 0x00000000 410862b4a29SBALATON Zoltan #define ROP3_SRCCOPY 0x00cc0000 411862b4a29SBALATON Zoltan #define ROP3_PATCOPY 0x00f00000 412862b4a29SBALATON Zoltan #define ROP3_WHITENESS 0x00ff0000 413862b4a29SBALATON Zoltan 414862b4a29SBALATON Zoltan #define SRC_DSTCOLOR 0x00030000 415862b4a29SBALATON Zoltan 416862b4a29SBALATON Zoltan /* DP_CNTL bit constants */ 417862b4a29SBALATON Zoltan #define DST_X_RIGHT_TO_LEFT 0x00000000 418862b4a29SBALATON Zoltan #define DST_X_LEFT_TO_RIGHT 0x00000001 419862b4a29SBALATON Zoltan #define DST_Y_BOTTOM_TO_TOP 0x00000000 420862b4a29SBALATON Zoltan #define DST_Y_TOP_TO_BOTTOM 0x00000002 421862b4a29SBALATON Zoltan #define DST_X_MAJOR 0x00000000 422862b4a29SBALATON Zoltan #define DST_Y_MAJOR 0x00000004 423862b4a29SBALATON Zoltan #define DST_X_TILE 0x00000008 424862b4a29SBALATON Zoltan #define DST_Y_TILE 0x00000010 425862b4a29SBALATON Zoltan #define DST_LAST_PEL 0x00000020 426862b4a29SBALATON Zoltan #define DST_TRAIL_X_RIGHT_TO_LEFT 0x00000000 427862b4a29SBALATON Zoltan #define DST_TRAIL_X_LEFT_TO_RIGHT 0x00000040 428862b4a29SBALATON Zoltan #define DST_TRAP_FILL_RIGHT_TO_LEFT 0x00000000 429862b4a29SBALATON Zoltan #define DST_TRAP_FILL_LEFT_TO_RIGHT 0x00000080 430862b4a29SBALATON Zoltan #define DST_BRES_SIGN 0x00000100 431862b4a29SBALATON Zoltan #define DST_HOST_BIG_ENDIAN_EN 0x00000200 432862b4a29SBALATON Zoltan #define DST_POLYLINE_NONLAST 0x00008000 433862b4a29SBALATON Zoltan #define DST_RASTER_STALL 0x00010000 434862b4a29SBALATON Zoltan #define DST_POLY_EDGE 0x00040000 435862b4a29SBALATON Zoltan 436862b4a29SBALATON Zoltan /* DP_MIX bit constants */ 437862b4a29SBALATON Zoltan #define DP_SRC_RECT 0x00000200 438862b4a29SBALATON Zoltan #define DP_SRC_HOST 0x00000300 439862b4a29SBALATON Zoltan #define DP_SRC_HOST_BYTEALIGN 0x00000400 440862b4a29SBALATON Zoltan 441862b4a29SBALATON Zoltan /* LVDS_GEN_CNTL constants */ 442862b4a29SBALATON Zoltan #define LVDS_BL_MOD_LEVEL_MASK 0x0000ff00 443862b4a29SBALATON Zoltan #define LVDS_BL_MOD_LEVEL_SHIFT 8 444862b4a29SBALATON Zoltan #define LVDS_BL_MOD_EN 0x00010000 445862b4a29SBALATON Zoltan #define LVDS_DIGION 0x00040000 446862b4a29SBALATON Zoltan #define LVDS_BLON 0x00080000 447862b4a29SBALATON Zoltan #define LVDS_ON 0x00000001 448862b4a29SBALATON Zoltan #define LVDS_DISPLAY_DIS 0x00000002 449862b4a29SBALATON Zoltan #define LVDS_PANEL_TYPE_2PIX_PER_CLK 0x00000004 450862b4a29SBALATON Zoltan #define LVDS_PANEL_24BITS_TFT 0x00000008 451862b4a29SBALATON Zoltan #define LVDS_FRAME_MOD_NO 0x00000000 452862b4a29SBALATON Zoltan #define LVDS_FRAME_MOD_2_LEVELS 0x00000010 453862b4a29SBALATON Zoltan #define LVDS_FRAME_MOD_4_LEVELS 0x00000020 454862b4a29SBALATON Zoltan #define LVDS_RST_FM 0x00000040 455862b4a29SBALATON Zoltan #define LVDS_EN 0x00000080 456862b4a29SBALATON Zoltan 457862b4a29SBALATON Zoltan /* CRTC2_GEN_CNTL constants */ 458862b4a29SBALATON Zoltan #define CRTC2_EN 0x02000000 459862b4a29SBALATON Zoltan 460862b4a29SBALATON Zoltan /* POWER_MANAGEMENT constants */ 461862b4a29SBALATON Zoltan #define PWR_MGT_ON 0x00000001 462862b4a29SBALATON Zoltan #define PWR_MGT_MODE_MASK 0x00000006 463862b4a29SBALATON Zoltan #define PWR_MGT_MODE_PIN 0x00000000 464862b4a29SBALATON Zoltan #define PWR_MGT_MODE_REGISTER 0x00000002 465862b4a29SBALATON Zoltan #define PWR_MGT_MODE_TIMER 0x00000004 466862b4a29SBALATON Zoltan #define PWR_MGT_MODE_PCI 0x00000006 467862b4a29SBALATON Zoltan #define PWR_MGT_AUTO_PWR_UP_EN 0x00000008 468862b4a29SBALATON Zoltan #define PWR_MGT_ACTIVITY_PIN_ON 0x00000010 469862b4a29SBALATON Zoltan #define PWR_MGT_STANDBY_POL 0x00000020 470862b4a29SBALATON Zoltan #define PWR_MGT_SUSPEND_POL 0x00000040 471862b4a29SBALATON Zoltan #define PWR_MGT_SELF_REFRESH 0x00000080 472862b4a29SBALATON Zoltan #define PWR_MGT_ACTIVITY_PIN_EN 0x00000100 473862b4a29SBALATON Zoltan #define PWR_MGT_KEYBD_SNOOP 0x00000200 474862b4a29SBALATON Zoltan #define PWR_MGT_TRISTATE_MEM_EN 0x00000800 475862b4a29SBALATON Zoltan #define PWR_MGT_SELW4MS 0x00001000 476862b4a29SBALATON Zoltan #define PWR_MGT_SLOWDOWN_MCLK 0x00002000 477862b4a29SBALATON Zoltan 478862b4a29SBALATON Zoltan #define PMI_PMSCR_REG 0x60 479862b4a29SBALATON Zoltan 480862b4a29SBALATON Zoltan /* used by ATI bug fix for hardware ROM */ 481862b4a29SBALATON Zoltan #define RAGE128_MPP_TB_CONFIG 0x01c0 482862b4a29SBALATON Zoltan 483862b4a29SBALATON Zoltan #endif /* ATI_REGS_H */ 484