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Searched refs:PPLL_REF_DIV_MASK (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/include/video/
H A Daty128.h268 #define PPLL_REF_DIV_MASK 0x3FF macro
H A Dradeon.h993 #define PPLL_REF_DIV_MASK 0x000003ff macro
/openbmc/qemu/hw/display/
H A Dati_regs.h313 #define PPLL_REF_DIV_MASK 0x000003FF macro
/openbmc/u-boot/drivers/video/
H A Dati_radeon_fb.c214 if ((mode->ppll_ref_div == (INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK)) && in radeon_write_pll_regs()
261 OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, ~PPLL_REF_DIV_MASK); in radeon_write_pll_regs()
/openbmc/linux/drivers/video/fbdev/aty/
H A Dradeon_base.c768 rinfo->pll.ref_div = INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK; in radeon_get_pllinfo()
1362 if ((mode->ppll_ref_div == (INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK)) && in radeon_write_pll_regs()
1409 OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, ~PPLL_REF_DIV_MASK); in radeon_write_pll_regs()
H A Dradeon_pm.c1649 tmp = (tmp & ~PPLL_REF_DIV_MASK) | rinfo->pll.ref_div; in radeon_pm_restore_pixel_pll()
2450 tmp = (tmp & ~PPLL_REF_DIV_MASK) | rinfo->pll.ref_div;
H A Daty128fb.c969 aty_ld_pll(PPLL_REF_DIV) & PPLL_REF_DIV_MASK; in aty128_timings()
/openbmc/u-boot/include/
H A Dradeon.h989 #define PPLL_REF_DIV_MASK 0x000003ff macro