PIN_OUTPUT_PULLDOWN (reference) in projects: openbmc

Searched refs:PIN_OUTPUT_PULLDOWN (Results 1 – 25 of 94) sorted by relevance

/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A D	logicpd-som-lv-baseboard.dtsi	183 …OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_pclk.dss_… 184 …OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_hsync.dss… 185 …OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_vsync.dss… 186 …OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_acbias.ds… 188 …OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data0.dss… 189 …OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data1.dss… 190 …OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data2.dss… 191 …OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data3.dss… 192 …OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data4.dss… 193 …OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data5.dss… [all …]
H A D	am335x-pcm-953.dtsi	80 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_csn1.gpio1_30 / 81 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / gpmc_csn2.gpio1_31 / 106 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a0.rgmii2_tctl / 108 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a2.rgmii2_td3 / 109 AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a3.rgmii2_td2 / 110 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a4.rgmii2_td1 / 111 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a5.rgmii2_td0 / 112 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a6.rgmii2_tclk / 147 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / uart0_ctsn.gpio1_8 / 148 AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / uart0_rtsn.gpio1_9 */ [all …]
H A D	logicpd-torpedo-baseboard.dtsi	287 …OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_pclk.dss_… 288 …OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_hsync.dss… 289 …OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_vsync.dss… 290 …OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_acbias.ds… 292 …OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data6.dss… 293 …OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data7.dss… 294 …OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data8.dss… 295 …OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data9.dss… 296 …OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data10.ds… 297 …OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data11.ds… [all …]
H A D	am335x-osd3358-sm-red.dts	202 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) 219 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 220 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 221 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 222 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 228 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) 235 …AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_a… 237 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 238 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 / 244 …AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / rmii1_ref_clk.gpio0_29… [all …]
H A D	am335x-boneblack-hdmi.dtsi	12 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) 29 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 30 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 31 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 32 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 38 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) 45 …AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_a… 47 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 48 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */
H A D	am335x-sancloud-bbe-common.dtsi	10 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl / 12 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd3.rgmii1_td3 / 13 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd2.rgmii1_td2 / 14 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd1.rgmii1_td1 / 15 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd0.rgmii1_td0 / 16 …AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txclk.rgmii1_tclk */
H A D	am437x-cm-t43.dts	91 AM4372_IOPAD(0x898, PIN_OUTPUT_PULLDOWN \| MUX_MODE0) 92 AM4372_IOPAD(0x894, PIN_OUTPUT_PULLDOWN \| MUX_MODE0) 93 AM4372_IOPAD(0x890, PIN_OUTPUT_PULLDOWN \| MUX_MODE0) 94 AM4372_IOPAD(0x89c, PIN_OUTPUT_PULLDOWN \| MUX_MODE0) 101 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) /* mii1_txen.rgmii1_txen / 103 AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_txd3 / 104 AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd0.rgmii1_txd2 / 105 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_txd1 / 106 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd0.rgmii1_txd0 / 107 AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txclk.rmii1_tclk */ [all …]
H A D	am335x-evmsk.dts	274 AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad4.gpio1_4 / 275 AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / gpmc_ad5.gpio1_5 / 276 AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / gpmc_ad6.gpio1_6 / 277 AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / gpmc_ad7.gpio1_7 / 300 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 306 …AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) / xdma_event_intr1.cl… 319 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl / 321 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd3.rgmii1_td3 / 322 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd2.rgmii1_td2 / 323 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd1.rgmii1_td1 */ [all …]
H A D	am335x-baltos-leds.dtsi	`42 … AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* mii1_col.gpio3_0 PWR LED / 43 …AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / mii1_txd3.gpio0_16 WLAN LE… 44 …AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* mii1_txd2.gpio0_17 APP LED…`
H A D	am335x-moxa-uc-8100-common.dtsi	73 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 80 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 89 … AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* lcd_data15.uart5_rtsn / 100 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE1) 101 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE1) 102 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE1) 110 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) / rmii2_txen / 111 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE3) / rmii2_td1 / 112 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE3) / rmii2_td0 */
H A D	am335x-baltos.dtsi	85 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 93 …AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_tx_en.rmii1_txe… 94 …AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_txd1.rmii1_txd1 … 95 …AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_txd0.rmii1_txd0 … 102 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a0.rgmii2_tctl / 104 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a2.rgmii2_td3 / 105 AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a3.rgmii2_td2 / 106 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a4.rgmii2_td1 / 107 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a5.rgmii2_td0 / 108 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a6.rgmii2_tclk */
H A D	am335x-chiliboard.dts	`42 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 51 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE1) 52 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE1) 53 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE1) 94 AM33XX_PADCONF(AM335X_PIN_USB1_DRVVBUS, PIN_OUTPUT_PULLDOWN, MUX_MODE0)`
H A D	am335x-sl50.dts	222 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) 268 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 269 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 270 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 271 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 287 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 294 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 301 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* gpmc_wpn.uart4_txd */ 323 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 325 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0) [all …]
H A D	am335x-bone-common.dtsi	71 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 / 73 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / gpmc_a7.gpio1_23 / 95 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 101 …AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) / xdma_event_intr1.cl… 109 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 111 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 112 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 113 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 114 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
H A D	am335x-myirtech-myc.dtsi	179 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii1_tctl / 181 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / rgmii1_td3 / 182 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / rgmii1_td2 / 183 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / rgmii1_td1 / 184 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / rgmii1_td0 / 185 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / rgmii1_tclk / 234 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE7) / gpio3[18] */
/openbmc/u-boot/arch/arm/dts/
H A D	logicpd-som-lv-baseboard.dtsi	202 …OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_pclk.dss_… 203 …OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_hsync.dss… 204 …OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_vsync.dss… 205 …OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_acbias.ds… 207 …OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data0.dss… 208 …OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data1.dss… 209 …OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data2.dss… 210 …OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data3.dss… 211 …OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data4.dss… 212 …OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data5.dss… [all …]
H A D	logicpd-torpedo-baseboard.dtsi	262 …OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_pclk.dss_… 263 …OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_hsync.dss… 264 …OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_vsync.dss… 265 …OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_acbias.ds… 267 …OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data6.dss… 268 …OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data7.dss… 269 …OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data8.dss… 270 …OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data9.dss… 271 …OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data10.ds… 272 …OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT_PULLDOWN \| PIN_OFF_OUTPUT_LOW \| MUX_MODE0) /* dss_data11.ds… [all …]
H A D	am335x-pxm2.dtsi	375 0x1b4 (PIN_OUTPUT_PULLDOWN \| MUX_MODE3) /* xdma_event_intr1.clkout2 / 382 0x114 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txen.rgmii1_tctl / 384 0x11c (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd3.rgmii1_td3 / 385 0x120 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd2.rgmii1_td2 / 386 0x124 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_td1 / 387 0x128 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd0.rgmii1_td0 / 388 0x12c (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txclk.rgmii1_tclk / 475 0x20 (PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / gpmc_ad8.lcd_data23 / 476 0x24 (PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / gpmc_ad9.lcd_data22 / 477 0x28 (PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / gpmc_ad10.lcd_data21 */ [all …]
H A D	am335x-evmsk.dts	277 AM33XX_IOPAD(0x810, PIN_OUTPUT_PULLDOWN \| MUX_MODE7) /* gpmc_ad4.gpio1_4 / 278 AM33XX_IOPAD(0x814, PIN_OUTPUT_PULLDOWN \| MUX_MODE7) / gpmc_ad5.gpio1_5 / 279 AM33XX_IOPAD(0x818, PIN_OUTPUT_PULLDOWN \| MUX_MODE7) / gpmc_ad6.gpio1_6 / 280 AM33XX_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN \| MUX_MODE7) / gpmc_ad7.gpio1_7 / 303 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN \| MUX_MODE0) / uart0_txd.uart0_txd / 309 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN \| MUX_MODE3) / xdma_event_intr1.clkout2 / 322 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txen.rgmii1_tctl / 324 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd3.rgmii1_td3 / 325 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd2.rgmii1_td2 / 326 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_td1 */ [all …]
H A D	am335x-bone-common.dtsi	75 0x54 (PIN_OUTPUT_PULLDOWN \| MUX_MODE7) /* gpmc_a5.gpio1_21 / 77 0x5c (PIN_OUTPUT_PULLDOWN \| MUX_MODE7) / gpmc_a7.gpio1_23 / 99 0x174 (PIN_OUTPUT_PULLDOWN \| MUX_MODE0) / uart0_txd.uart0_txd / 105 0x1b4 (PIN_OUTPUT_PULLDOWN \| MUX_MODE3) / xdma_event_intr1.clkout2 / 113 0x114 (PIN_OUTPUT_PULLDOWN \| MUX_MODE0) / mii1_txen.mii1_txen / 115 0x11c (PIN_OUTPUT_PULLDOWN \| MUX_MODE0) / mii1_txd3.mii1_txd3 / 116 0x120 (PIN_OUTPUT_PULLDOWN \| MUX_MODE0) / mii1_txd2.mii1_txd2 / 117 0x124 (PIN_OUTPUT_PULLDOWN \| MUX_MODE0) / mii1_txd1.mii1_txd1 / 118 0x128 (PIN_OUTPUT_PULLDOWN \| MUX_MODE0) / mii1_txd0.mii1_txd0 */
H A D	am335x-baltos.dts	76 0x174 (PIN_OUTPUT_PULLDOWN \| MUX_MODE0) /* uart0_txd.uart0_txd / 84 0x114 (PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / mii1_tx_en.rmii1_txen / 85 0x124 (PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / mii1_txd1.rmii1_txd1 / 86 0x128 (PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / mii1_txd0.rmii1_txd0 / 93 0x40 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / gpmc_a0.rgmii2_tctl / 95 0x48 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / gpmc_a2.rgmii2_td3 / 96 0x4c (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / gpmc_a3.rgmii2_td2 / 97 0x50 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / gpmc_a4.rgmii2_td1 / 98 0x54 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / gpmc_a5.rgmii2_td0 / 99 0x58 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / gpmc_a6.rgmii2_tclk */
H A D	am335x-rut.dts	422 0x1b4 (PIN_OUTPUT_PULLDOWN \| MUX_MODE3) /* xdma_event_intr1.clkout2 / 519 0x20 (PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / gpmc_ad8.lcd_data23 / 520 0x24 (PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / gpmc_ad9.lcd_data22 / 521 0x28 (PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / gpmc_ad10.lcd_data21 / 522 0x2c (PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / gpmc_ad11.lcd_data20 / 523 0x30 (PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / gpmc_ad12.lcd_data19 / 524 0x34 (PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / gpmc_ad13.lcd_data18 / 525 0x38 (PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / gpmc_ad14.lcd_data17 / 526 0x3c (PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / gpmc_ad15.lcd_data16 / 543 0xe0 (PIN_OUTPUT_PULLDOWN \| MUX_MODE0) / lcd_vsync.lcd_vsync */ [all …]
H A D	am335x-evm.dts	161 0x54 (PIN_OUTPUT_PULLDOWN \| MUX_MODE7) /* gpmc_a5.gpio1_21 / 162 0x58 (PIN_OUTPUT_PULLDOWN \| MUX_MODE7) / gpmc_a6.gpio1_22 / 193 0x174 (PIN_OUTPUT_PULLDOWN \| MUX_MODE0) / uart0_txd.uart0_txd / 200 0x17C (PIN_OUTPUT_PULLDOWN \| MUX_MODE0) / uart1_rtsn.uart1_rtsn / 202 0x184 (PIN_OUTPUT_PULLDOWN \| MUX_MODE0) / uart1_txd.uart1_txd / 208 0x1b4 (PIN_OUTPUT_PULLDOWN \| MUX_MODE3) / xdma_event_intr1.clkout2 / 241 0x114 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txen.rgmii1_tctl / 243 0x11c (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd3.rgmii1_td3 / 244 0x120 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd2.rgmii1_td2 / 245 0x124 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_td1 */ [all …]
H A D	am335x-chiliboard.dts	`41 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN \| MUX_MODE0) /* uart0_txd.uart0_txd / 50 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / mii1_txen.rmii1_txen / 51 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / mii1_txd1.rmii1_txd1 / 52 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN \| MUX_MODE1) / mii1_txd0.rmii1_txd0 / 93 AM33XX_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN \| MUX_MODE0) / usb1_drvvbus.usb1_drvvbus */`
/openbmc/u-boot/board/ti/am57xx/
H A D	mux_data.h	101 {VIN2A_D10, (M10 \| PIN_OUTPUT_PULLDOWN)}, /* vin2a_d10.ehrpwm2B / 134 {USB2_DRVVBUS, (M0 \| PIN_OUTPUT_PULLDOWN \| SLEWCONTROL)}, / usb2_drvvbus.usb2_drvvbus / 138 {XREF_CLK0, (M9 \| PIN_OUTPUT_PULLDOWN)}, / xref_clk0.clkout2 / 141 {XREF_CLK3, (M9 \| PIN_OUTPUT_PULLDOWN)}, / xref_clk3.clkout3 / 181 {GPIO6_10, (M10 \| PIN_OUTPUT_PULLDOWN)}, / gpio6_10.ehrpwm2A / 341 {VIN1A_D18, (M14 \| PIN_OUTPUT_PULLDOWN)}, / vin1a_d18.gpio3_22 / 354 {VIN2A_D5, (M13 \| PIN_OUTPUT_PULLDOWN \| MANUAL_MODE)}, / vin2a_d5.pr1_pru1_gpo2 / 355 {VIN2A_D10, (M11 \| PIN_OUTPUT_PULLDOWN)}, / vin2a_d10.pr1_mdio_mdclk / 357 {VIN2A_D12, (M3 \| PIN_OUTPUT_PULLDOWN \| MANUAL_MODE)}, / vin2a_d12.rgmii1_txc / 358 {VIN2A_D13, (M3 \| PIN_OUTPUT_PULLDOWN \| MANUAL_MODE)}, / vin2a_d13.rgmii1_txctl */ [all …]

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