15cc16cbfSSimon Glass/* 25cc16cbfSSimon Glass * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 35cc16cbfSSimon Glass * 45cc16cbfSSimon Glass * This program is free software; you can redistribute it and/or modify 55cc16cbfSSimon Glass * it under the terms of the GNU General Public License version 2 as 65cc16cbfSSimon Glass * published by the Free Software Foundation. 75cc16cbfSSimon Glass */ 85cc16cbfSSimon Glass 95cc16cbfSSimon Glass/ { 105cc16cbfSSimon Glass cpus { 115cc16cbfSSimon Glass cpu@0 { 125cc16cbfSSimon Glass cpu0-supply = <&dcdc2_reg>; 135cc16cbfSSimon Glass }; 145cc16cbfSSimon Glass }; 155cc16cbfSSimon Glass 16a1b48851SLokesh Vutla chosen { 17a1b48851SLokesh Vutla stdout-path = &uart0; 18a1b48851SLokesh Vutla tick-timer = &timer2; 19a1b48851SLokesh Vutla }; 20a1b48851SLokesh Vutla 215cc16cbfSSimon Glass memory { 225cc16cbfSSimon Glass device_type = "memory"; 235cc16cbfSSimon Glass reg = <0x80000000 0x10000000>; /* 256 MB */ 245cc16cbfSSimon Glass }; 255cc16cbfSSimon Glass 261480fdf8STom Rini leds { 271480fdf8STom Rini pinctrl-names = "default"; 281480fdf8STom Rini pinctrl-0 = <&user_leds_s0>; 291480fdf8STom Rini 301480fdf8STom Rini compatible = "gpio-leds"; 311480fdf8STom Rini 321480fdf8STom Rini led@2 { 331480fdf8STom Rini label = "beaglebone:green:heartbeat"; 341480fdf8STom Rini gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; 351480fdf8STom Rini linux,default-trigger = "heartbeat"; 361480fdf8STom Rini default-state = "off"; 371480fdf8STom Rini }; 381480fdf8STom Rini 391480fdf8STom Rini led@3 { 401480fdf8STom Rini label = "beaglebone:green:mmc0"; 411480fdf8STom Rini gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; 421480fdf8STom Rini linux,default-trigger = "mmc0"; 431480fdf8STom Rini default-state = "off"; 441480fdf8STom Rini }; 451480fdf8STom Rini 461480fdf8STom Rini led@4 { 471480fdf8STom Rini label = "beaglebone:green:usr2"; 481480fdf8STom Rini gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; 491480fdf8STom Rini linux,default-trigger = "cpu0"; 501480fdf8STom Rini default-state = "off"; 511480fdf8STom Rini }; 521480fdf8STom Rini 531480fdf8STom Rini led@5 { 541480fdf8STom Rini label = "beaglebone:green:usr3"; 551480fdf8STom Rini gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; 561480fdf8STom Rini linux,default-trigger = "mmc1"; 571480fdf8STom Rini default-state = "off"; 581480fdf8STom Rini }; 591480fdf8STom Rini }; 601480fdf8STom Rini 611480fdf8STom Rini vmmcsd_fixed: fixedregulator@0 { 621480fdf8STom Rini compatible = "regulator-fixed"; 631480fdf8STom Rini regulator-name = "vmmcsd_fixed"; 641480fdf8STom Rini regulator-min-microvolt = <3300000>; 651480fdf8STom Rini regulator-max-microvolt = <3300000>; 661480fdf8STom Rini }; 671480fdf8STom Rini}; 681480fdf8STom Rini 691480fdf8STom Rini&am33xx_pinmux { 705cc16cbfSSimon Glass pinctrl-names = "default"; 715cc16cbfSSimon Glass pinctrl-0 = <&clkout2_pin>; 725cc16cbfSSimon Glass 735cc16cbfSSimon Glass user_leds_s0: user_leds_s0 { 745cc16cbfSSimon Glass pinctrl-single,pins = < 755cc16cbfSSimon Glass 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ 765cc16cbfSSimon Glass 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ 775cc16cbfSSimon Glass 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ 785cc16cbfSSimon Glass 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ 795cc16cbfSSimon Glass >; 805cc16cbfSSimon Glass }; 815cc16cbfSSimon Glass 825cc16cbfSSimon Glass i2c0_pins: pinmux_i2c0_pins { 835cc16cbfSSimon Glass pinctrl-single,pins = < 845cc16cbfSSimon Glass 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 855cc16cbfSSimon Glass 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 865cc16cbfSSimon Glass >; 875cc16cbfSSimon Glass }; 885cc16cbfSSimon Glass 891480fdf8STom Rini i2c2_pins: pinmux_i2c2_pins { 901480fdf8STom Rini pinctrl-single,pins = < 911480fdf8STom Rini 0x178 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */ 921480fdf8STom Rini 0x17c (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */ 931480fdf8STom Rini >; 941480fdf8STom Rini }; 951480fdf8STom Rini 965cc16cbfSSimon Glass uart0_pins: pinmux_uart0_pins { 975cc16cbfSSimon Glass pinctrl-single,pins = < 985cc16cbfSSimon Glass 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 995cc16cbfSSimon Glass 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ 1005cc16cbfSSimon Glass >; 1015cc16cbfSSimon Glass }; 1025cc16cbfSSimon Glass 1035cc16cbfSSimon Glass clkout2_pin: pinmux_clkout2_pin { 1045cc16cbfSSimon Glass pinctrl-single,pins = < 1055cc16cbfSSimon Glass 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ 1065cc16cbfSSimon Glass >; 1075cc16cbfSSimon Glass }; 1085cc16cbfSSimon Glass 1095cc16cbfSSimon Glass cpsw_default: cpsw_default { 1105cc16cbfSSimon Glass pinctrl-single,pins = < 1115cc16cbfSSimon Glass /* Slave 1 */ 1125cc16cbfSSimon Glass 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ 1135cc16cbfSSimon Glass 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ 1145cc16cbfSSimon Glass 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ 1155cc16cbfSSimon Glass 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ 1165cc16cbfSSimon Glass 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ 1175cc16cbfSSimon Glass 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ 1185cc16cbfSSimon Glass 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ 1195cc16cbfSSimon Glass 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ 1205cc16cbfSSimon Glass 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ 1215cc16cbfSSimon Glass 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ 1225cc16cbfSSimon Glass 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ 1235cc16cbfSSimon Glass 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ 1245cc16cbfSSimon Glass 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ 1255cc16cbfSSimon Glass >; 1265cc16cbfSSimon Glass }; 1275cc16cbfSSimon Glass 1285cc16cbfSSimon Glass cpsw_sleep: cpsw_sleep { 1295cc16cbfSSimon Glass pinctrl-single,pins = < 1305cc16cbfSSimon Glass /* Slave 1 reset value */ 1315cc16cbfSSimon Glass 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) 1325cc16cbfSSimon Glass 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) 1335cc16cbfSSimon Glass 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) 1345cc16cbfSSimon Glass 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) 1355cc16cbfSSimon Glass 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) 1365cc16cbfSSimon Glass 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) 1375cc16cbfSSimon Glass 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) 1385cc16cbfSSimon Glass 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) 1395cc16cbfSSimon Glass 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) 1405cc16cbfSSimon Glass 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) 1415cc16cbfSSimon Glass 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) 1425cc16cbfSSimon Glass 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) 1435cc16cbfSSimon Glass 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) 1445cc16cbfSSimon Glass >; 1455cc16cbfSSimon Glass }; 1465cc16cbfSSimon Glass 1475cc16cbfSSimon Glass davinci_mdio_default: davinci_mdio_default { 1485cc16cbfSSimon Glass pinctrl-single,pins = < 1495cc16cbfSSimon Glass /* MDIO */ 1505cc16cbfSSimon Glass 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 1515cc16cbfSSimon Glass 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 1525cc16cbfSSimon Glass >; 1535cc16cbfSSimon Glass }; 1545cc16cbfSSimon Glass 1555cc16cbfSSimon Glass davinci_mdio_sleep: davinci_mdio_sleep { 1565cc16cbfSSimon Glass pinctrl-single,pins = < 1575cc16cbfSSimon Glass /* MDIO reset value */ 1585cc16cbfSSimon Glass 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) 1595cc16cbfSSimon Glass 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) 1605cc16cbfSSimon Glass >; 1615cc16cbfSSimon Glass }; 1621480fdf8STom Rini 1631480fdf8STom Rini mmc1_pins: pinmux_mmc1_pins { 1641480fdf8STom Rini pinctrl-single,pins = < 1651480fdf8STom Rini 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */ 1661480fdf8STom Rini >; 1675cc16cbfSSimon Glass }; 1685cc16cbfSSimon Glass 1691480fdf8STom Rini emmc_pins: pinmux_emmc_pins { 1701480fdf8STom Rini pinctrl-single,pins = < 1711480fdf8STom Rini 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ 1721480fdf8STom Rini 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ 1731480fdf8STom Rini 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ 1741480fdf8STom Rini 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ 1751480fdf8STom Rini 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ 1761480fdf8STom Rini 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ 1771480fdf8STom Rini 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ 1781480fdf8STom Rini 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ 1791480fdf8STom Rini 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ 1801480fdf8STom Rini 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ 1811480fdf8STom Rini >; 1821480fdf8STom Rini }; 1831480fdf8STom Rini}; 1841480fdf8STom Rini 1851480fdf8STom Rini&uart0 { 1865cc16cbfSSimon Glass pinctrl-names = "default"; 1875cc16cbfSSimon Glass pinctrl-0 = <&uart0_pins>; 1885cc16cbfSSimon Glass 1895cc16cbfSSimon Glass status = "okay"; 1905cc16cbfSSimon Glass}; 1915cc16cbfSSimon Glass 1921480fdf8STom Rini&usb { 1935cc16cbfSSimon Glass status = "okay"; 1945cc16cbfSSimon Glass}; 1955cc16cbfSSimon Glass 1961480fdf8STom Rini&usb_ctrl_mod { 1975cc16cbfSSimon Glass status = "okay"; 1985cc16cbfSSimon Glass}; 1995cc16cbfSSimon Glass 2001480fdf8STom Rini&usb0_phy { 2015cc16cbfSSimon Glass status = "okay"; 2025cc16cbfSSimon Glass}; 2035cc16cbfSSimon Glass 2041480fdf8STom Rini&usb1_phy { 2055cc16cbfSSimon Glass status = "okay"; 2065cc16cbfSSimon Glass}; 2075cc16cbfSSimon Glass 2081480fdf8STom Rini&usb0 { 2091480fdf8STom Rini status = "okay"; 2101480fdf8STom Rini dr_mode = "peripheral"; 2111480fdf8STom Rini}; 2121480fdf8STom Rini 2131480fdf8STom Rini&usb1 { 2145cc16cbfSSimon Glass status = "okay"; 2155cc16cbfSSimon Glass dr_mode = "host"; 2165cc16cbfSSimon Glass}; 2175cc16cbfSSimon Glass 2181480fdf8STom Rini&cppi41dma { 2195cc16cbfSSimon Glass status = "okay"; 2205cc16cbfSSimon Glass}; 2215cc16cbfSSimon Glass 2221480fdf8STom Rini&i2c0 { 2235cc16cbfSSimon Glass pinctrl-names = "default"; 2245cc16cbfSSimon Glass pinctrl-0 = <&i2c0_pins>; 2255cc16cbfSSimon Glass 2265cc16cbfSSimon Glass status = "okay"; 2275cc16cbfSSimon Glass clock-frequency = <400000>; 2285cc16cbfSSimon Glass 2295cc16cbfSSimon Glass tps: tps@24 { 2305cc16cbfSSimon Glass reg = <0x24>; 2315cc16cbfSSimon Glass }; 2325cc16cbfSSimon Glass 2331480fdf8STom Rini baseboard_eeprom: baseboard_eeprom@50 { 2341480fdf8STom Rini compatible = "at,24c256"; 2351480fdf8STom Rini reg = <0x50>; 2361480fdf8STom Rini 2371480fdf8STom Rini #address-cells = <1>; 2381480fdf8STom Rini #size-cells = <1>; 2391480fdf8STom Rini baseboard_data: baseboard_data@0 { 2401480fdf8STom Rini reg = <0 0x100>; 2411480fdf8STom Rini }; 2425cc16cbfSSimon Glass }; 2435cc16cbfSSimon Glass}; 2445cc16cbfSSimon Glass 2451480fdf8STom Rini&i2c2 { 2465cc16cbfSSimon Glass pinctrl-names = "default"; 2471480fdf8STom Rini pinctrl-0 = <&i2c2_pins>; 2485cc16cbfSSimon Glass 2491480fdf8STom Rini status = "okay"; 2501480fdf8STom Rini clock-frequency = <100000>; 2515cc16cbfSSimon Glass 2521480fdf8STom Rini cape_eeprom0: cape_eeprom0@54 { 2531480fdf8STom Rini compatible = "at,24c256"; 2541480fdf8STom Rini reg = <0x54>; 2551480fdf8STom Rini #address-cells = <1>; 2561480fdf8STom Rini #size-cells = <1>; 2571480fdf8STom Rini cape0_data: cape_data@0 { 2581480fdf8STom Rini reg = <0 0x100>; 2591480fdf8STom Rini }; 2605cc16cbfSSimon Glass }; 2615cc16cbfSSimon Glass 2621480fdf8STom Rini cape_eeprom1: cape_eeprom1@55 { 2631480fdf8STom Rini compatible = "at,24c256"; 2641480fdf8STom Rini reg = <0x55>; 2651480fdf8STom Rini #address-cells = <1>; 2661480fdf8STom Rini #size-cells = <1>; 2671480fdf8STom Rini cape1_data: cape_data@0 { 2681480fdf8STom Rini reg = <0 0x100>; 2691480fdf8STom Rini }; 2705cc16cbfSSimon Glass }; 2715cc16cbfSSimon Glass 2721480fdf8STom Rini cape_eeprom2: cape_eeprom2@56 { 2731480fdf8STom Rini compatible = "at,24c256"; 2741480fdf8STom Rini reg = <0x56>; 2751480fdf8STom Rini #address-cells = <1>; 2761480fdf8STom Rini #size-cells = <1>; 2771480fdf8STom Rini cape2_data: cape_data@0 { 2781480fdf8STom Rini reg = <0 0x100>; 2791480fdf8STom Rini }; 2805cc16cbfSSimon Glass }; 2815cc16cbfSSimon Glass 2821480fdf8STom Rini cape_eeprom3: cape_eeprom3@57 { 2831480fdf8STom Rini compatible = "at,24c256"; 2841480fdf8STom Rini reg = <0x57>; 2851480fdf8STom Rini #address-cells = <1>; 2861480fdf8STom Rini #size-cells = <1>; 2871480fdf8STom Rini cape3_data: cape_data@0 { 2881480fdf8STom Rini reg = <0 0x100>; 2895cc16cbfSSimon Glass }; 2905cc16cbfSSimon Glass }; 2915cc16cbfSSimon Glass}; 2925cc16cbfSSimon Glass 2931480fdf8STom Rini 2945cc16cbfSSimon Glass/include/ "tps65217.dtsi" 2955cc16cbfSSimon Glass 2965cc16cbfSSimon Glass&tps { 2971480fdf8STom Rini /* 2981480fdf8STom Rini * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only 2991480fdf8STom Rini * mode") at poweroff. Most BeagleBone versions do not support RTC-only 3001480fdf8STom Rini * mode and risk hardware damage if this mode is entered. 3011480fdf8STom Rini * 3021480fdf8STom Rini * For details, see linux-omap mailing list May 2015 thread 3031480fdf8STom Rini * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller 3041480fdf8STom Rini * In particular, messages: 3051480fdf8STom Rini * http://www.spinics.net/lists/linux-omap/msg118585.html 3061480fdf8STom Rini * http://www.spinics.net/lists/linux-omap/msg118615.html 3071480fdf8STom Rini * 3081480fdf8STom Rini * You can override this later with 3091480fdf8STom Rini * &tps { /delete-property/ ti,pmic-shutdown-controller; } 3101480fdf8STom Rini * if you want to use RTC-only mode and made sure you are not affected 3111480fdf8STom Rini * by the hardware problems. (Tip: double-check by performing a current 3121480fdf8STom Rini * measurement after shutdown: it should be less than 1 mA.) 3131480fdf8STom Rini */ 3141480fdf8STom Rini ti,pmic-shutdown-controller; 3151480fdf8STom Rini 3165cc16cbfSSimon Glass regulators { 3175cc16cbfSSimon Glass dcdc1_reg: regulator@0 { 3181480fdf8STom Rini regulator-name = "vdds_dpr"; 3195cc16cbfSSimon Glass regulator-always-on; 3205cc16cbfSSimon Glass }; 3215cc16cbfSSimon Glass 3225cc16cbfSSimon Glass dcdc2_reg: regulator@1 { 3235cc16cbfSSimon Glass /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 3245cc16cbfSSimon Glass regulator-name = "vdd_mpu"; 3255cc16cbfSSimon Glass regulator-min-microvolt = <925000>; 3265cc16cbfSSimon Glass regulator-max-microvolt = <1325000>; 3275cc16cbfSSimon Glass regulator-boot-on; 3285cc16cbfSSimon Glass regulator-always-on; 3295cc16cbfSSimon Glass }; 3305cc16cbfSSimon Glass 3315cc16cbfSSimon Glass dcdc3_reg: regulator@2 { 3325cc16cbfSSimon Glass /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 3335cc16cbfSSimon Glass regulator-name = "vdd_core"; 3345cc16cbfSSimon Glass regulator-min-microvolt = <925000>; 3355cc16cbfSSimon Glass regulator-max-microvolt = <1150000>; 3365cc16cbfSSimon Glass regulator-boot-on; 3375cc16cbfSSimon Glass regulator-always-on; 3385cc16cbfSSimon Glass }; 3395cc16cbfSSimon Glass 3405cc16cbfSSimon Glass ldo1_reg: regulator@3 { 3411480fdf8STom Rini regulator-name = "vio,vrtc,vdds"; 3425cc16cbfSSimon Glass regulator-always-on; 3435cc16cbfSSimon Glass }; 3445cc16cbfSSimon Glass 3455cc16cbfSSimon Glass ldo2_reg: regulator@4 { 3461480fdf8STom Rini regulator-name = "vdd_3v3aux"; 3475cc16cbfSSimon Glass regulator-always-on; 3485cc16cbfSSimon Glass }; 3495cc16cbfSSimon Glass 3505cc16cbfSSimon Glass ldo3_reg: regulator@5 { 3511480fdf8STom Rini regulator-name = "vdd_1v8"; 3525cc16cbfSSimon Glass regulator-always-on; 3535cc16cbfSSimon Glass }; 3545cc16cbfSSimon Glass 3555cc16cbfSSimon Glass ldo4_reg: regulator@6 { 3561480fdf8STom Rini regulator-name = "vdd_3v3a"; 3575cc16cbfSSimon Glass regulator-always-on; 3585cc16cbfSSimon Glass }; 3595cc16cbfSSimon Glass }; 3605cc16cbfSSimon Glass}; 3615cc16cbfSSimon Glass 3625cc16cbfSSimon Glass&cpsw_emac0 { 3635cc16cbfSSimon Glass phy_id = <&davinci_mdio>, <0>; 3645cc16cbfSSimon Glass phy-mode = "mii"; 3655cc16cbfSSimon Glass}; 3665cc16cbfSSimon Glass 3675cc16cbfSSimon Glass&cpsw_emac1 { 3685cc16cbfSSimon Glass phy_id = <&davinci_mdio>, <1>; 3695cc16cbfSSimon Glass phy-mode = "mii"; 3705cc16cbfSSimon Glass}; 3715cc16cbfSSimon Glass 3725cc16cbfSSimon Glass&mac { 3735cc16cbfSSimon Glass pinctrl-names = "default", "sleep"; 3745cc16cbfSSimon Glass pinctrl-0 = <&cpsw_default>; 3755cc16cbfSSimon Glass pinctrl-1 = <&cpsw_sleep>; 3761480fdf8STom Rini status = "okay"; 3775cc16cbfSSimon Glass}; 3785cc16cbfSSimon Glass 3795cc16cbfSSimon Glass&davinci_mdio { 3805cc16cbfSSimon Glass pinctrl-names = "default", "sleep"; 3815cc16cbfSSimon Glass pinctrl-0 = <&davinci_mdio_default>; 3825cc16cbfSSimon Glass pinctrl-1 = <&davinci_mdio_sleep>; 3831480fdf8STom Rini status = "okay"; 3841480fdf8STom Rini}; 3851480fdf8STom Rini 3861480fdf8STom Rini&mmc1 { 3871480fdf8STom Rini status = "okay"; 3881480fdf8STom Rini bus-width = <0x4>; 3891480fdf8STom Rini pinctrl-names = "default"; 3901480fdf8STom Rini pinctrl-0 = <&mmc1_pins>; 391*2c6485bcSMugunthan V N cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 3921480fdf8STom Rini}; 3931480fdf8STom Rini 3941480fdf8STom Rini&aes { 3951480fdf8STom Rini status = "okay"; 3961480fdf8STom Rini}; 3971480fdf8STom Rini 3981480fdf8STom Rini&sham { 3991480fdf8STom Rini status = "okay"; 4005cc16cbfSSimon Glass}; 401