xref: /openbmc/u-boot/arch/arm/dts/am335x-evmsk.dts (revision 3589025867274ff28f689029ab8323301771c8ec)
1*3819ea70SLokesh Vutla/*
2*3819ea70SLokesh Vutla * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3*3819ea70SLokesh Vutla *
4*3819ea70SLokesh Vutla * This program is free software; you can redistribute it and/or modify
5*3819ea70SLokesh Vutla * it under the terms of the GNU General Public License version 2 as
6*3819ea70SLokesh Vutla * published by the Free Software Foundation.
7*3819ea70SLokesh Vutla */
8*3819ea70SLokesh Vutla
9*3819ea70SLokesh Vutla/*
10*3819ea70SLokesh Vutla * AM335x Starter Kit
11*3819ea70SLokesh Vutla * http://www.ti.com/tool/tmdssk3358
12*3819ea70SLokesh Vutla */
13*3819ea70SLokesh Vutla
14*3819ea70SLokesh Vutla/dts-v1/;
15*3819ea70SLokesh Vutla
16*3819ea70SLokesh Vutla#include "am33xx.dtsi"
17*3819ea70SLokesh Vutla#include <dt-bindings/pwm/pwm.h>
18*3819ea70SLokesh Vutla#include <dt-bindings/interrupt-controller/irq.h>
19*3819ea70SLokesh Vutla
20*3819ea70SLokesh Vutla/ {
21*3819ea70SLokesh Vutla	model = "TI AM335x EVM-SK";
22*3819ea70SLokesh Vutla	compatible = "ti,am335x-evmsk", "ti,am33xx";
23*3819ea70SLokesh Vutla
24*3819ea70SLokesh Vutla	chosen {
25*3819ea70SLokesh Vutla		stdout-path = &uart0;
26*3819ea70SLokesh Vutla		tick-timer = &timer2;
27*3819ea70SLokesh Vutla	};
28*3819ea70SLokesh Vutla
29*3819ea70SLokesh Vutla	cpus {
30*3819ea70SLokesh Vutla		cpu@0 {
31*3819ea70SLokesh Vutla			cpu0-supply = <&vdd1_reg>;
32*3819ea70SLokesh Vutla		};
33*3819ea70SLokesh Vutla	};
34*3819ea70SLokesh Vutla
35*3819ea70SLokesh Vutla	memory {
36*3819ea70SLokesh Vutla		device_type = "memory";
37*3819ea70SLokesh Vutla		reg = <0x80000000 0x10000000>; /* 256 MB */
38*3819ea70SLokesh Vutla	};
39*3819ea70SLokesh Vutla
40*3819ea70SLokesh Vutla	vbat: fixedregulator@0 {
41*3819ea70SLokesh Vutla		compatible = "regulator-fixed";
42*3819ea70SLokesh Vutla		regulator-name = "vbat";
43*3819ea70SLokesh Vutla		regulator-min-microvolt = <5000000>;
44*3819ea70SLokesh Vutla		regulator-max-microvolt = <5000000>;
45*3819ea70SLokesh Vutla		regulator-boot-on;
46*3819ea70SLokesh Vutla	};
47*3819ea70SLokesh Vutla
48*3819ea70SLokesh Vutla	lis3_reg: fixedregulator@1 {
49*3819ea70SLokesh Vutla		compatible = "regulator-fixed";
50*3819ea70SLokesh Vutla		regulator-name = "lis3_reg";
51*3819ea70SLokesh Vutla		regulator-boot-on;
52*3819ea70SLokesh Vutla	};
53*3819ea70SLokesh Vutla
54*3819ea70SLokesh Vutla	wl12xx_vmmc: fixedregulator@2 {
55*3819ea70SLokesh Vutla		pinctrl-names = "default";
56*3819ea70SLokesh Vutla		pinctrl-0 = <&wl12xx_gpio>;
57*3819ea70SLokesh Vutla		compatible = "regulator-fixed";
58*3819ea70SLokesh Vutla		regulator-name = "vwl1271";
59*3819ea70SLokesh Vutla		regulator-min-microvolt = <1800000>;
60*3819ea70SLokesh Vutla		regulator-max-microvolt = <1800000>;
61*3819ea70SLokesh Vutla		gpio = <&gpio1 29 0>;
62*3819ea70SLokesh Vutla		startup-delay-us = <70000>;
63*3819ea70SLokesh Vutla		enable-active-high;
64*3819ea70SLokesh Vutla	};
65*3819ea70SLokesh Vutla
66*3819ea70SLokesh Vutla	vtt_fixed: fixedregulator@3 {
67*3819ea70SLokesh Vutla		compatible = "regulator-fixed";
68*3819ea70SLokesh Vutla		regulator-name = "vtt";
69*3819ea70SLokesh Vutla		regulator-min-microvolt = <1500000>;
70*3819ea70SLokesh Vutla		regulator-max-microvolt = <1500000>;
71*3819ea70SLokesh Vutla		gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
72*3819ea70SLokesh Vutla		regulator-always-on;
73*3819ea70SLokesh Vutla		regulator-boot-on;
74*3819ea70SLokesh Vutla		enable-active-high;
75*3819ea70SLokesh Vutla	};
76*3819ea70SLokesh Vutla
77*3819ea70SLokesh Vutla	leds {
78*3819ea70SLokesh Vutla		pinctrl-names = "default";
79*3819ea70SLokesh Vutla		pinctrl-0 = <&user_leds_s0>;
80*3819ea70SLokesh Vutla
81*3819ea70SLokesh Vutla		compatible = "gpio-leds";
82*3819ea70SLokesh Vutla
83*3819ea70SLokesh Vutla		led@1 {
84*3819ea70SLokesh Vutla			label = "evmsk:green:usr0";
85*3819ea70SLokesh Vutla			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
86*3819ea70SLokesh Vutla			default-state = "off";
87*3819ea70SLokesh Vutla		};
88*3819ea70SLokesh Vutla
89*3819ea70SLokesh Vutla		led@2 {
90*3819ea70SLokesh Vutla			label = "evmsk:green:usr1";
91*3819ea70SLokesh Vutla			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
92*3819ea70SLokesh Vutla			default-state = "off";
93*3819ea70SLokesh Vutla		};
94*3819ea70SLokesh Vutla
95*3819ea70SLokesh Vutla		led@3 {
96*3819ea70SLokesh Vutla			label = "evmsk:green:mmc0";
97*3819ea70SLokesh Vutla			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
98*3819ea70SLokesh Vutla			linux,default-trigger = "mmc0";
99*3819ea70SLokesh Vutla			default-state = "off";
100*3819ea70SLokesh Vutla		};
101*3819ea70SLokesh Vutla
102*3819ea70SLokesh Vutla		led@4 {
103*3819ea70SLokesh Vutla			label = "evmsk:green:heartbeat";
104*3819ea70SLokesh Vutla			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
105*3819ea70SLokesh Vutla			linux,default-trigger = "heartbeat";
106*3819ea70SLokesh Vutla			default-state = "off";
107*3819ea70SLokesh Vutla		};
108*3819ea70SLokesh Vutla	};
109*3819ea70SLokesh Vutla
110*3819ea70SLokesh Vutla	gpio_buttons: gpio_buttons@0 {
111*3819ea70SLokesh Vutla		compatible = "gpio-keys";
112*3819ea70SLokesh Vutla
113*3819ea70SLokesh Vutla		switch@1 {
114*3819ea70SLokesh Vutla			label = "button0";
115*3819ea70SLokesh Vutla			linux,code = <0x100>;
116*3819ea70SLokesh Vutla			gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
117*3819ea70SLokesh Vutla		};
118*3819ea70SLokesh Vutla
119*3819ea70SLokesh Vutla		switch@2 {
120*3819ea70SLokesh Vutla			label = "button1";
121*3819ea70SLokesh Vutla			linux,code = <0x101>;
122*3819ea70SLokesh Vutla			gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
123*3819ea70SLokesh Vutla		};
124*3819ea70SLokesh Vutla
125*3819ea70SLokesh Vutla		switch@3 {
126*3819ea70SLokesh Vutla			label = "button2";
127*3819ea70SLokesh Vutla			linux,code = <0x102>;
128*3819ea70SLokesh Vutla			gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
129*3819ea70SLokesh Vutla			wakeup-source;
130*3819ea70SLokesh Vutla		};
131*3819ea70SLokesh Vutla
132*3819ea70SLokesh Vutla		switch@4 {
133*3819ea70SLokesh Vutla			label = "button3";
134*3819ea70SLokesh Vutla			linux,code = <0x103>;
135*3819ea70SLokesh Vutla			gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
136*3819ea70SLokesh Vutla		};
137*3819ea70SLokesh Vutla	};
138*3819ea70SLokesh Vutla
139*3819ea70SLokesh Vutla	backlight {
140*3819ea70SLokesh Vutla		compatible = "pwm-backlight";
141*3819ea70SLokesh Vutla		pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
142*3819ea70SLokesh Vutla		brightness-levels = <0 58 61 66 75 90 125 170 255>;
143*3819ea70SLokesh Vutla		default-brightness-level = <8>;
144*3819ea70SLokesh Vutla	};
145*3819ea70SLokesh Vutla
146*3819ea70SLokesh Vutla	sound {
147*3819ea70SLokesh Vutla		compatible = "simple-audio-card";
148*3819ea70SLokesh Vutla		simple-audio-card,name = "AM335x-EVMSK";
149*3819ea70SLokesh Vutla		simple-audio-card,widgets =
150*3819ea70SLokesh Vutla			"Headphone", "Headphone Jack";
151*3819ea70SLokesh Vutla		simple-audio-card,routing =
152*3819ea70SLokesh Vutla			"Headphone Jack",	"HPLOUT",
153*3819ea70SLokesh Vutla			"Headphone Jack",	"HPROUT";
154*3819ea70SLokesh Vutla		simple-audio-card,format = "dsp_b";
155*3819ea70SLokesh Vutla		simple-audio-card,bitclock-master = <&sound_master>;
156*3819ea70SLokesh Vutla		simple-audio-card,frame-master = <&sound_master>;
157*3819ea70SLokesh Vutla		simple-audio-card,bitclock-inversion;
158*3819ea70SLokesh Vutla
159*3819ea70SLokesh Vutla		simple-audio-card,cpu {
160*3819ea70SLokesh Vutla			sound-dai = <&mcasp1>;
161*3819ea70SLokesh Vutla		};
162*3819ea70SLokesh Vutla
163*3819ea70SLokesh Vutla		sound_master: simple-audio-card,codec {
164*3819ea70SLokesh Vutla			sound-dai = <&tlv320aic3106>;
165*3819ea70SLokesh Vutla			system-clock-frequency = <24000000>;
166*3819ea70SLokesh Vutla		};
167*3819ea70SLokesh Vutla	};
168*3819ea70SLokesh Vutla
169*3819ea70SLokesh Vutla	panel {
170*3819ea70SLokesh Vutla		compatible = "ti,tilcdc,panel";
171*3819ea70SLokesh Vutla		pinctrl-names = "default", "sleep";
172*3819ea70SLokesh Vutla		pinctrl-0 = <&lcd_pins_default>;
173*3819ea70SLokesh Vutla		pinctrl-1 = <&lcd_pins_sleep>;
174*3819ea70SLokesh Vutla		status = "okay";
175*3819ea70SLokesh Vutla		panel-info {
176*3819ea70SLokesh Vutla			ac-bias           = <255>;
177*3819ea70SLokesh Vutla			ac-bias-intrpt    = <0>;
178*3819ea70SLokesh Vutla			dma-burst-sz      = <16>;
179*3819ea70SLokesh Vutla			bpp               = <32>;
180*3819ea70SLokesh Vutla			fdd               = <0x80>;
181*3819ea70SLokesh Vutla			sync-edge         = <0>;
182*3819ea70SLokesh Vutla			sync-ctrl         = <1>;
183*3819ea70SLokesh Vutla			raster-order      = <0>;
184*3819ea70SLokesh Vutla			fifo-th           = <0>;
185*3819ea70SLokesh Vutla		};
186*3819ea70SLokesh Vutla		display-timings {
187*3819ea70SLokesh Vutla			480x272 {
188*3819ea70SLokesh Vutla				hactive         = <480>;
189*3819ea70SLokesh Vutla				vactive         = <272>;
190*3819ea70SLokesh Vutla				hback-porch     = <43>;
191*3819ea70SLokesh Vutla				hfront-porch    = <8>;
192*3819ea70SLokesh Vutla				hsync-len       = <4>;
193*3819ea70SLokesh Vutla				vback-porch     = <12>;
194*3819ea70SLokesh Vutla				vfront-porch    = <4>;
195*3819ea70SLokesh Vutla				vsync-len       = <10>;
196*3819ea70SLokesh Vutla				clock-frequency = <9000000>;
197*3819ea70SLokesh Vutla				hsync-active    = <0>;
198*3819ea70SLokesh Vutla				vsync-active    = <0>;
199*3819ea70SLokesh Vutla			};
200*3819ea70SLokesh Vutla		};
201*3819ea70SLokesh Vutla	};
202*3819ea70SLokesh Vutla};
203*3819ea70SLokesh Vutla
204*3819ea70SLokesh Vutla&am33xx_pinmux {
205*3819ea70SLokesh Vutla	pinctrl-names = "default";
206*3819ea70SLokesh Vutla	pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
207*3819ea70SLokesh Vutla
208*3819ea70SLokesh Vutla	lcd_pins_default: lcd_pins_default {
209*3819ea70SLokesh Vutla		pinctrl-single,pins = <
210*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad8.lcd_data23 */
211*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad9.lcd_data22 */
212*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad10.lcd_data21 */
213*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad11.lcd_data20 */
214*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad12.lcd_data19 */
215*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad13.lcd_data18 */
216*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad14.lcd_data17 */
217*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad15.lcd_data16 */
218*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)	/* lcd_data0.lcd_data0 */
219*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)	/* lcd_data1.lcd_data1 */
220*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)	/* lcd_data2.lcd_data2 */
221*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)	/* lcd_data3.lcd_data3 */
222*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)	/* lcd_data4.lcd_data4 */
223*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)	/* lcd_data5.lcd_data5 */
224*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)	/* lcd_data6.lcd_data6 */
225*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)	/* lcd_data7.lcd_data7 */
226*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)	/* lcd_data8.lcd_data8 */
227*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)	/* lcd_data9.lcd_data9 */
228*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)	/* lcd_data10.lcd_data10 */
229*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)	/* lcd_data11.lcd_data11 */
230*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)	/* lcd_data12.lcd_data12 */
231*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)	/* lcd_data13.lcd_data13 */
232*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)	/* lcd_data14.lcd_data14 */
233*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)	/* lcd_data15.lcd_data15 */
234*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0)	/* lcd_vsync.lcd_vsync */
235*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0)	/* lcd_hsync.lcd_hsync */
236*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0)	/* lcd_pclk.lcd_pclk */
237*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0)	/* lcd_ac_bias_en.lcd_ac_bias_en */
238*3819ea70SLokesh Vutla		>;
239*3819ea70SLokesh Vutla	};
240*3819ea70SLokesh Vutla
241*3819ea70SLokesh Vutla	lcd_pins_sleep: lcd_pins_sleep {
242*3819ea70SLokesh Vutla		pinctrl-single,pins = <
243*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x820, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad8.lcd_data23 */
244*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x824, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad9.lcd_data22 */
245*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x828, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad10.lcd_data21 */
246*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x82c, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad11.lcd_data20 */
247*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x830, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad12.lcd_data19 */
248*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad13.lcd_data18 */
249*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad14.lcd_data17 */
250*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad15.lcd_data16 */
251*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8a0, PULL_DISABLE | MUX_MODE7)	/* lcd_data0.lcd_data0 */
252*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8a4, PULL_DISABLE | MUX_MODE7)	/* lcd_data1.lcd_data1 */
253*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8a8, PULL_DISABLE | MUX_MODE7)	/* lcd_data2.lcd_data2 */
254*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8ac, PULL_DISABLE | MUX_MODE7)	/* lcd_data3.lcd_data3 */
255*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8b0, PULL_DISABLE | MUX_MODE7)	/* lcd_data4.lcd_data4 */
256*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8b4, PULL_DISABLE | MUX_MODE7)	/* lcd_data5.lcd_data5 */
257*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8b8, PULL_DISABLE | MUX_MODE7)	/* lcd_data6.lcd_data6 */
258*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8bc, PULL_DISABLE | MUX_MODE7)	/* lcd_data7.lcd_data7 */
259*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8c0, PULL_DISABLE | MUX_MODE7)	/* lcd_data8.lcd_data8 */
260*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8c4, PULL_DISABLE | MUX_MODE7)	/* lcd_data9.lcd_data9 */
261*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8c8, PULL_DISABLE | MUX_MODE7)	/* lcd_data10.lcd_data10 */
262*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8cc, PULL_DISABLE | MUX_MODE7)	/* lcd_data11.lcd_data11 */
263*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8d0, PULL_DISABLE | MUX_MODE7)	/* lcd_data12.lcd_data12 */
264*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8d4, PULL_DISABLE | MUX_MODE7)	/* lcd_data13.lcd_data13 */
265*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8d8, PULL_DISABLE | MUX_MODE7)	/* lcd_data14.lcd_data14 */
266*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8dc, PULL_DISABLE | MUX_MODE7)	/* lcd_data15.lcd_data15 */
267*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_vsync.lcd_vsync */
268*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_hsync.lcd_hsync */
269*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_pclk.lcd_pclk */
270*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_ac_bias_en.lcd_ac_bias_en */
271*3819ea70SLokesh Vutla		>;
272*3819ea70SLokesh Vutla	};
273*3819ea70SLokesh Vutla
274*3819ea70SLokesh Vutla
275*3819ea70SLokesh Vutla	user_leds_s0: user_leds_s0 {
276*3819ea70SLokesh Vutla		pinctrl-single,pins = <
277*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x810, PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad4.gpio1_4 */
278*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x814, PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad5.gpio1_5 */
279*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x818, PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad6.gpio1_6 */
280*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad7.gpio1_7 */
281*3819ea70SLokesh Vutla		>;
282*3819ea70SLokesh Vutla	};
283*3819ea70SLokesh Vutla
284*3819ea70SLokesh Vutla	gpio_keys_s0: gpio_keys_s0 {
285*3819ea70SLokesh Vutla		pinctrl-single,pins = <
286*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_oen_ren.gpio2_3 */
287*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_advn_ale.gpio2_2 */
288*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_wait0.gpio0_30 */
289*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ben0_cle.gpio2_5 */
290*3819ea70SLokesh Vutla		>;
291*3819ea70SLokesh Vutla	};
292*3819ea70SLokesh Vutla
293*3819ea70SLokesh Vutla	i2c0_pins: pinmux_i2c0_pins {
294*3819ea70SLokesh Vutla		pinctrl-single,pins = <
295*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
296*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
297*3819ea70SLokesh Vutla		>;
298*3819ea70SLokesh Vutla	};
299*3819ea70SLokesh Vutla
300*3819ea70SLokesh Vutla	uart0_pins: pinmux_uart0_pins {
301*3819ea70SLokesh Vutla		pinctrl-single,pins = <
302*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
303*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
304*3819ea70SLokesh Vutla		>;
305*3819ea70SLokesh Vutla	};
306*3819ea70SLokesh Vutla
307*3819ea70SLokesh Vutla	clkout2_pin: pinmux_clkout2_pin {
308*3819ea70SLokesh Vutla		pinctrl-single,pins = <
309*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */
310*3819ea70SLokesh Vutla		>;
311*3819ea70SLokesh Vutla	};
312*3819ea70SLokesh Vutla
313*3819ea70SLokesh Vutla	ecap2_pins: backlight_pins {
314*3819ea70SLokesh Vutla		pinctrl-single,pins = <
315*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x99c, MUX_MODE4)	/* mcasp0_ahclkr.ecap2_in_pwm2_out */
316*3819ea70SLokesh Vutla		>;
317*3819ea70SLokesh Vutla	};
318*3819ea70SLokesh Vutla
319*3819ea70SLokesh Vutla	cpsw_default: cpsw_default {
320*3819ea70SLokesh Vutla		pinctrl-single,pins = <
321*3819ea70SLokesh Vutla			/* Slave 1 */
322*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
323*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
324*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
325*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
326*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
327*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
328*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
329*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rgmii1_rclk */
330*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
331*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
332*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
333*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
334*3819ea70SLokesh Vutla
335*3819ea70SLokesh Vutla			/* Slave 2 */
336*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
337*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a1.rgmii2_rctl */
338*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
339*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
340*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
341*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
342*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
343*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
344*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
345*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
346*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
347*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
348*3819ea70SLokesh Vutla		>;
349*3819ea70SLokesh Vutla	};
350*3819ea70SLokesh Vutla
351*3819ea70SLokesh Vutla	cpsw_sleep: cpsw_sleep {
352*3819ea70SLokesh Vutla		pinctrl-single,pins = <
353*3819ea70SLokesh Vutla			/* Slave 1 reset value */
354*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
355*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
356*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
357*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
358*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
359*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
360*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
361*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
362*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
363*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
364*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
365*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
366*3819ea70SLokesh Vutla
367*3819ea70SLokesh Vutla			/* Slave 2 reset value*/
368*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
369*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
370*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
371*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
372*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
373*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
374*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
375*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
376*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
377*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
378*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
379*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
380*3819ea70SLokesh Vutla		>;
381*3819ea70SLokesh Vutla	};
382*3819ea70SLokesh Vutla
383*3819ea70SLokesh Vutla	davinci_mdio_default: davinci_mdio_default {
384*3819ea70SLokesh Vutla		pinctrl-single,pins = <
385*3819ea70SLokesh Vutla			/* MDIO */
386*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
387*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
388*3819ea70SLokesh Vutla		>;
389*3819ea70SLokesh Vutla	};
390*3819ea70SLokesh Vutla
391*3819ea70SLokesh Vutla	davinci_mdio_sleep: davinci_mdio_sleep {
392*3819ea70SLokesh Vutla		pinctrl-single,pins = <
393*3819ea70SLokesh Vutla			/* MDIO reset value */
394*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
395*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
396*3819ea70SLokesh Vutla		>;
397*3819ea70SLokesh Vutla	};
398*3819ea70SLokesh Vutla
399*3819ea70SLokesh Vutla	mmc1_pins: pinmux_mmc1_pins {
400*3819ea70SLokesh Vutla		pinctrl-single,pins = <
401*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
402*3819ea70SLokesh Vutla		>;
403*3819ea70SLokesh Vutla	};
404*3819ea70SLokesh Vutla
405*3819ea70SLokesh Vutla	mcasp1_pins: mcasp1_pins {
406*3819ea70SLokesh Vutla		pinctrl-single,pins = <
407*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
408*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
409*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
410*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
411*3819ea70SLokesh Vutla		>;
412*3819ea70SLokesh Vutla	};
413*3819ea70SLokesh Vutla
414*3819ea70SLokesh Vutla	mcasp1_pins_sleep: mcasp1_pins_sleep {
415*3819ea70SLokesh Vutla		pinctrl-single,pins = <
416*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
417*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
418*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
419*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
420*3819ea70SLokesh Vutla		>;
421*3819ea70SLokesh Vutla	};
422*3819ea70SLokesh Vutla
423*3819ea70SLokesh Vutla	mmc2_pins: pinmux_mmc2_pins {
424*3819ea70SLokesh Vutla		pinctrl-single,pins = <
425*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
426*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
427*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
428*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
429*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
430*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
431*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
432*3819ea70SLokesh Vutla		>;
433*3819ea70SLokesh Vutla	};
434*3819ea70SLokesh Vutla
435*3819ea70SLokesh Vutla	wl12xx_gpio: pinmux_wl12xx_gpio {
436*3819ea70SLokesh Vutla		pinctrl-single,pins = <
437*3819ea70SLokesh Vutla			AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
438*3819ea70SLokesh Vutla		>;
439*3819ea70SLokesh Vutla	};
440*3819ea70SLokesh Vutla};
441*3819ea70SLokesh Vutla
442*3819ea70SLokesh Vutla&uart0 {
443*3819ea70SLokesh Vutla	pinctrl-names = "default";
444*3819ea70SLokesh Vutla	pinctrl-0 = <&uart0_pins>;
445*3819ea70SLokesh Vutla
446*3819ea70SLokesh Vutla	status = "okay";
447*3819ea70SLokesh Vutla};
448*3819ea70SLokesh Vutla
449*3819ea70SLokesh Vutla&i2c0 {
450*3819ea70SLokesh Vutla	pinctrl-names = "default";
451*3819ea70SLokesh Vutla	pinctrl-0 = <&i2c0_pins>;
452*3819ea70SLokesh Vutla
453*3819ea70SLokesh Vutla	status = "okay";
454*3819ea70SLokesh Vutla	clock-frequency = <400000>;
455*3819ea70SLokesh Vutla
456*3819ea70SLokesh Vutla	tps: tps@2d {
457*3819ea70SLokesh Vutla		reg = <0x2d>;
458*3819ea70SLokesh Vutla	};
459*3819ea70SLokesh Vutla
460*3819ea70SLokesh Vutla	lis331dlh: lis331dlh@18 {
461*3819ea70SLokesh Vutla		compatible = "st,lis331dlh", "st,lis3lv02d";
462*3819ea70SLokesh Vutla		reg = <0x18>;
463*3819ea70SLokesh Vutla		Vdd-supply = <&lis3_reg>;
464*3819ea70SLokesh Vutla		Vdd_IO-supply = <&lis3_reg>;
465*3819ea70SLokesh Vutla
466*3819ea70SLokesh Vutla		st,click-single-x;
467*3819ea70SLokesh Vutla		st,click-single-y;
468*3819ea70SLokesh Vutla		st,click-single-z;
469*3819ea70SLokesh Vutla		st,click-thresh-x = <10>;
470*3819ea70SLokesh Vutla		st,click-thresh-y = <10>;
471*3819ea70SLokesh Vutla		st,click-thresh-z = <10>;
472*3819ea70SLokesh Vutla		st,irq1-click;
473*3819ea70SLokesh Vutla		st,irq2-click;
474*3819ea70SLokesh Vutla		st,wakeup-x-lo;
475*3819ea70SLokesh Vutla		st,wakeup-x-hi;
476*3819ea70SLokesh Vutla		st,wakeup-y-lo;
477*3819ea70SLokesh Vutla		st,wakeup-y-hi;
478*3819ea70SLokesh Vutla		st,wakeup-z-lo;
479*3819ea70SLokesh Vutla		st,wakeup-z-hi;
480*3819ea70SLokesh Vutla		st,min-limit-x = <120>;
481*3819ea70SLokesh Vutla		st,min-limit-y = <120>;
482*3819ea70SLokesh Vutla		st,min-limit-z = <140>;
483*3819ea70SLokesh Vutla		st,max-limit-x = <550>;
484*3819ea70SLokesh Vutla		st,max-limit-y = <550>;
485*3819ea70SLokesh Vutla		st,max-limit-z = <750>;
486*3819ea70SLokesh Vutla	};
487*3819ea70SLokesh Vutla
488*3819ea70SLokesh Vutla	tlv320aic3106: tlv320aic3106@1b {
489*3819ea70SLokesh Vutla		#sound-dai-cells = <0>;
490*3819ea70SLokesh Vutla		compatible = "ti,tlv320aic3106";
491*3819ea70SLokesh Vutla		reg = <0x1b>;
492*3819ea70SLokesh Vutla		status = "okay";
493*3819ea70SLokesh Vutla
494*3819ea70SLokesh Vutla		/* Regulators */
495*3819ea70SLokesh Vutla		AVDD-supply = <&vaux2_reg>;
496*3819ea70SLokesh Vutla		IOVDD-supply = <&vaux2_reg>;
497*3819ea70SLokesh Vutla		DRVDD-supply = <&vaux2_reg>;
498*3819ea70SLokesh Vutla		DVDD-supply = <&vbat>;
499*3819ea70SLokesh Vutla	};
500*3819ea70SLokesh Vutla};
501*3819ea70SLokesh Vutla
502*3819ea70SLokesh Vutla&usb {
503*3819ea70SLokesh Vutla	status = "okay";
504*3819ea70SLokesh Vutla};
505*3819ea70SLokesh Vutla
506*3819ea70SLokesh Vutla&usb_ctrl_mod {
507*3819ea70SLokesh Vutla	status = "okay";
508*3819ea70SLokesh Vutla};
509*3819ea70SLokesh Vutla
510*3819ea70SLokesh Vutla&usb0_phy {
511*3819ea70SLokesh Vutla	status = "okay";
512*3819ea70SLokesh Vutla};
513*3819ea70SLokesh Vutla
514*3819ea70SLokesh Vutla&usb1_phy {
515*3819ea70SLokesh Vutla	status = "okay";
516*3819ea70SLokesh Vutla};
517*3819ea70SLokesh Vutla
518*3819ea70SLokesh Vutla&usb0 {
519*3819ea70SLokesh Vutla	status = "okay";
520*3819ea70SLokesh Vutla};
521*3819ea70SLokesh Vutla
522*3819ea70SLokesh Vutla&usb1 {
523*3819ea70SLokesh Vutla	status = "okay";
524*3819ea70SLokesh Vutla	dr_mode = "host";
525*3819ea70SLokesh Vutla};
526*3819ea70SLokesh Vutla
527*3819ea70SLokesh Vutla&cppi41dma  {
528*3819ea70SLokesh Vutla	status = "okay";
529*3819ea70SLokesh Vutla};
530*3819ea70SLokesh Vutla
531*3819ea70SLokesh Vutla&epwmss2 {
532*3819ea70SLokesh Vutla	status = "okay";
533*3819ea70SLokesh Vutla
534*3819ea70SLokesh Vutla	ecap2: ecap@48304100 {
535*3819ea70SLokesh Vutla		status = "okay";
536*3819ea70SLokesh Vutla		pinctrl-names = "default";
537*3819ea70SLokesh Vutla		pinctrl-0 = <&ecap2_pins>;
538*3819ea70SLokesh Vutla	};
539*3819ea70SLokesh Vutla};
540*3819ea70SLokesh Vutla
541*3819ea70SLokesh Vutla#include "tps65910.dtsi"
542*3819ea70SLokesh Vutla
543*3819ea70SLokesh Vutla&tps {
544*3819ea70SLokesh Vutla	vcc1-supply = <&vbat>;
545*3819ea70SLokesh Vutla	vcc2-supply = <&vbat>;
546*3819ea70SLokesh Vutla	vcc3-supply = <&vbat>;
547*3819ea70SLokesh Vutla	vcc4-supply = <&vbat>;
548*3819ea70SLokesh Vutla	vcc5-supply = <&vbat>;
549*3819ea70SLokesh Vutla	vcc6-supply = <&vbat>;
550*3819ea70SLokesh Vutla	vcc7-supply = <&vbat>;
551*3819ea70SLokesh Vutla	vccio-supply = <&vbat>;
552*3819ea70SLokesh Vutla
553*3819ea70SLokesh Vutla	regulators {
554*3819ea70SLokesh Vutla		vrtc_reg: regulator@0 {
555*3819ea70SLokesh Vutla			regulator-always-on;
556*3819ea70SLokesh Vutla		};
557*3819ea70SLokesh Vutla
558*3819ea70SLokesh Vutla		vio_reg: regulator@1 {
559*3819ea70SLokesh Vutla			regulator-always-on;
560*3819ea70SLokesh Vutla		};
561*3819ea70SLokesh Vutla
562*3819ea70SLokesh Vutla		vdd1_reg: regulator@2 {
563*3819ea70SLokesh Vutla			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
564*3819ea70SLokesh Vutla			regulator-name = "vdd_mpu";
565*3819ea70SLokesh Vutla			regulator-min-microvolt = <912500>;
566*3819ea70SLokesh Vutla			regulator-max-microvolt = <1312500>;
567*3819ea70SLokesh Vutla			regulator-boot-on;
568*3819ea70SLokesh Vutla			regulator-always-on;
569*3819ea70SLokesh Vutla		};
570*3819ea70SLokesh Vutla
571*3819ea70SLokesh Vutla		vdd2_reg: regulator@3 {
572*3819ea70SLokesh Vutla			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
573*3819ea70SLokesh Vutla			regulator-name = "vdd_core";
574*3819ea70SLokesh Vutla			regulator-min-microvolt = <912500>;
575*3819ea70SLokesh Vutla			regulator-max-microvolt = <1150000>;
576*3819ea70SLokesh Vutla			regulator-boot-on;
577*3819ea70SLokesh Vutla			regulator-always-on;
578*3819ea70SLokesh Vutla		};
579*3819ea70SLokesh Vutla
580*3819ea70SLokesh Vutla		vdd3_reg: regulator@4 {
581*3819ea70SLokesh Vutla			regulator-always-on;
582*3819ea70SLokesh Vutla		};
583*3819ea70SLokesh Vutla
584*3819ea70SLokesh Vutla		vdig1_reg: regulator@5 {
585*3819ea70SLokesh Vutla			regulator-always-on;
586*3819ea70SLokesh Vutla		};
587*3819ea70SLokesh Vutla
588*3819ea70SLokesh Vutla		vdig2_reg: regulator@6 {
589*3819ea70SLokesh Vutla			regulator-always-on;
590*3819ea70SLokesh Vutla		};
591*3819ea70SLokesh Vutla
592*3819ea70SLokesh Vutla		vpll_reg: regulator@7 {
593*3819ea70SLokesh Vutla			regulator-always-on;
594*3819ea70SLokesh Vutla		};
595*3819ea70SLokesh Vutla
596*3819ea70SLokesh Vutla		vdac_reg: regulator@8 {
597*3819ea70SLokesh Vutla			regulator-always-on;
598*3819ea70SLokesh Vutla		};
599*3819ea70SLokesh Vutla
600*3819ea70SLokesh Vutla		vaux1_reg: regulator@9 {
601*3819ea70SLokesh Vutla			regulator-always-on;
602*3819ea70SLokesh Vutla		};
603*3819ea70SLokesh Vutla
604*3819ea70SLokesh Vutla		vaux2_reg: regulator@10 {
605*3819ea70SLokesh Vutla			regulator-always-on;
606*3819ea70SLokesh Vutla		};
607*3819ea70SLokesh Vutla
608*3819ea70SLokesh Vutla		vaux33_reg: regulator@11 {
609*3819ea70SLokesh Vutla			regulator-always-on;
610*3819ea70SLokesh Vutla		};
611*3819ea70SLokesh Vutla
612*3819ea70SLokesh Vutla		vmmc_reg: regulator@12 {
613*3819ea70SLokesh Vutla			regulator-min-microvolt = <1800000>;
614*3819ea70SLokesh Vutla			regulator-max-microvolt = <3300000>;
615*3819ea70SLokesh Vutla			regulator-always-on;
616*3819ea70SLokesh Vutla		};
617*3819ea70SLokesh Vutla	};
618*3819ea70SLokesh Vutla};
619*3819ea70SLokesh Vutla
620*3819ea70SLokesh Vutla&mac {
621*3819ea70SLokesh Vutla	pinctrl-names = "default", "sleep";
622*3819ea70SLokesh Vutla	pinctrl-0 = <&cpsw_default>;
623*3819ea70SLokesh Vutla	pinctrl-1 = <&cpsw_sleep>;
624*3819ea70SLokesh Vutla	dual_emac = <1>;
625*3819ea70SLokesh Vutla	status = "okay";
626*3819ea70SLokesh Vutla};
627*3819ea70SLokesh Vutla
628*3819ea70SLokesh Vutla&davinci_mdio {
629*3819ea70SLokesh Vutla	pinctrl-names = "default", "sleep";
630*3819ea70SLokesh Vutla	pinctrl-0 = <&davinci_mdio_default>;
631*3819ea70SLokesh Vutla	pinctrl-1 = <&davinci_mdio_sleep>;
632*3819ea70SLokesh Vutla	status = "okay";
633*3819ea70SLokesh Vutla};
634*3819ea70SLokesh Vutla
635*3819ea70SLokesh Vutla&cpsw_emac0 {
636*3819ea70SLokesh Vutla	phy_id = <&davinci_mdio>, <0>;
637*3819ea70SLokesh Vutla	phy-mode = "rgmii-txid";
638*3819ea70SLokesh Vutla	dual_emac_res_vlan = <1>;
639*3819ea70SLokesh Vutla};
640*3819ea70SLokesh Vutla
641*3819ea70SLokesh Vutla&cpsw_emac1 {
642*3819ea70SLokesh Vutla	phy_id = <&davinci_mdio>, <1>;
643*3819ea70SLokesh Vutla	phy-mode = "rgmii-txid";
644*3819ea70SLokesh Vutla	dual_emac_res_vlan = <2>;
645*3819ea70SLokesh Vutla};
646*3819ea70SLokesh Vutla
647*3819ea70SLokesh Vutla&mmc1 {
648*3819ea70SLokesh Vutla	status = "okay";
649*3819ea70SLokesh Vutla	vmmc-supply = <&vmmc_reg>;
650*3819ea70SLokesh Vutla	bus-width = <4>;
651*3819ea70SLokesh Vutla	pinctrl-names = "default";
652*3819ea70SLokesh Vutla	pinctrl-0 = <&mmc1_pins>;
653*3819ea70SLokesh Vutla	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
654*3819ea70SLokesh Vutla};
655*3819ea70SLokesh Vutla
656*3819ea70SLokesh Vutla&sham {
657*3819ea70SLokesh Vutla	status = "okay";
658*3819ea70SLokesh Vutla};
659*3819ea70SLokesh Vutla
660*3819ea70SLokesh Vutla&aes {
661*3819ea70SLokesh Vutla	status = "okay";
662*3819ea70SLokesh Vutla};
663*3819ea70SLokesh Vutla
664*3819ea70SLokesh Vutla&gpio0 {
665*3819ea70SLokesh Vutla	ti,no-reset-on-init;
666*3819ea70SLokesh Vutla};
667*3819ea70SLokesh Vutla
668*3819ea70SLokesh Vutla&mmc2 {
669*3819ea70SLokesh Vutla	status = "okay";
670*3819ea70SLokesh Vutla	vmmc-supply = <&wl12xx_vmmc>;
671*3819ea70SLokesh Vutla	ti,non-removable;
672*3819ea70SLokesh Vutla	bus-width = <4>;
673*3819ea70SLokesh Vutla	cap-power-off-card;
674*3819ea70SLokesh Vutla	pinctrl-names = "default";
675*3819ea70SLokesh Vutla	pinctrl-0 = <&mmc2_pins>;
676*3819ea70SLokesh Vutla
677*3819ea70SLokesh Vutla	#address-cells = <1>;
678*3819ea70SLokesh Vutla	#size-cells = <0>;
679*3819ea70SLokesh Vutla	wlcore: wlcore@2 {
680*3819ea70SLokesh Vutla		compatible = "ti,wl1271";
681*3819ea70SLokesh Vutla		reg = <2>;
682*3819ea70SLokesh Vutla		interrupt-parent = <&gpio0>;
683*3819ea70SLokesh Vutla		interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; /* gpio 31 */
684*3819ea70SLokesh Vutla		ref-clock-frequency = <38400000>;
685*3819ea70SLokesh Vutla	};
686*3819ea70SLokesh Vutla};
687*3819ea70SLokesh Vutla
688*3819ea70SLokesh Vutla&mcasp1 {
689*3819ea70SLokesh Vutla	#sound-dai-cells = <0>;
690*3819ea70SLokesh Vutla	pinctrl-names = "default", "sleep";
691*3819ea70SLokesh Vutla	pinctrl-0 = <&mcasp1_pins>;
692*3819ea70SLokesh Vutla	pinctrl-1 = <&mcasp1_pins_sleep>;
693*3819ea70SLokesh Vutla
694*3819ea70SLokesh Vutla	status = "okay";
695*3819ea70SLokesh Vutla
696*3819ea70SLokesh Vutla	op-mode = <0>;          /* MCASP_IIS_MODE */
697*3819ea70SLokesh Vutla	tdm-slots = <2>;
698*3819ea70SLokesh Vutla	/* 4 serializers */
699*3819ea70SLokesh Vutla	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
700*3819ea70SLokesh Vutla		0 0 1 2
701*3819ea70SLokesh Vutla	>;
702*3819ea70SLokesh Vutla	tx-num-evt = <32>;
703*3819ea70SLokesh Vutla	rx-num-evt = <32>;
704*3819ea70SLokesh Vutla};
705*3819ea70SLokesh Vutla
706*3819ea70SLokesh Vutla&tscadc {
707*3819ea70SLokesh Vutla	status = "okay";
708*3819ea70SLokesh Vutla	tsc {
709*3819ea70SLokesh Vutla		ti,wires = <4>;
710*3819ea70SLokesh Vutla		ti,x-plate-resistance = <200>;
711*3819ea70SLokesh Vutla		ti,coordinate-readouts = <5>;
712*3819ea70SLokesh Vutla		ti,wire-config = <0x00 0x11 0x22 0x33>;
713*3819ea70SLokesh Vutla	};
714*3819ea70SLokesh Vutla};
715*3819ea70SLokesh Vutla
716*3819ea70SLokesh Vutla&lcdc {
717*3819ea70SLokesh Vutla      status = "okay";
718*3819ea70SLokesh Vutla};
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