Searched refs:PDC (Results 1 – 22 of 22) sorted by relevance
1 The PDC driver manages data transfer to and from various offload engines2 on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is3 one device tree entry per block. On some chips, the PDC functionality is9 - reg: Should contain PDC registers location and length.10 - interrupts: Should contain the IRQ line for the PDC.20 reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */
1 * ImgTec Powerdown Controller (PDC) Interrupt Controller Binding4 representation of a PDC IRQ controller. This has a number of input interrupt13 - reg: Specifies the base PDC physical address(s) and size(s) of the27 shared SysWake interrupt, and remaining specifies shall be PDC peripheral52 * TZ1090 PDC block82 * An SoC peripheral that is wired through the PDC.
116 bool "PDC chassis state codes support"134 bool "PDC chassis warnings support"148 tristate "PDC Stable Storage support"153 variables (PDC non volatile variables such as Primary Boot Path,
1 *ImgTec PowerDown Controller (PDC) Watchdog Timer (WDT)
31 - PDC transfer:
219 reg = <0x612c0000 0x445>; /* PDC FS0 regs */235 reg = <0x612e0000 0x445>; /* PDC FS1 regs */251 reg = <0x61300000 0x445>; /* PDC FS2 regs */267 reg = <0x61320000 0x445>; /* PDC FS3 regs */
178 tristate "Qualcomm PDC Reset Driver"181 This enables the PDC (Power Domain Controller) reset driver183 to control reset signals provided by PDC for Modem, Compute,
25 tristate "SoC PCM DAI support for AT91 SSC controller using PDC"31 in PDC mode configured using audio-graph-card in device-tree.
295 short PDC, PDCA; member
3007 if(ivideo->SiS_Pr.PDC == -1) { in sisfb_save_pdc_emi()3009 ivideo->SiS_Pr.PDC = ivideo->detectedpdc; in sisfb_save_pdc_emi()3014 if((ivideo->SiS_Pr.PDC != -1) && in sisfb_save_pdc_emi()3015 (ivideo->SiS_Pr.PDC != ivideo->detectedpdc)) { in sisfb_save_pdc_emi()3017 ivideo->SiS_Pr.PDC); in sisfb_save_pdc_emi()3058 if(ivideo->SiS_Pr.PDC == -1) { in sisfb_save_pdc_emi()3060 ivideo->SiS_Pr.PDC = ivideo->detectedpdc; in sisfb_save_pdc_emi()3095 if((ivideo->SiS_Pr.PDC != -1) && in sisfb_save_pdc_emi()3096 (ivideo->SiS_Pr.PDC != ivideo->detectedpdc)) { in sisfb_save_pdc_emi()3098 ivideo->SiS_Pr.PDC); in sisfb_save_pdc_emi()[all …]
6510 if(SiS_Pr->PDC != -1) temp = SiS_Pr->PDC; in SiS_SetGroup1()6524 if(SiS_Pr->PDC != -1) temp = SiS_Pr->PDC; in SiS_SetGroup1()9991 if(SiS_Pr->PDC != -1) { in SetDelayComp()9992 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2d,0xf0,((SiS_Pr->PDC >> 1) & 0x0f)); in SetDelayComp()9993 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x35,0x7f,((SiS_Pr->PDC & 0x01) << 7)); in SetDelayComp()10593 if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (SiS_Pr->PDC != -1)) { in SetDelayComp661()10594 delay = SiS_Pr->PDC & 0x1f; in SetDelayComp661()11080 if(SiS_Pr->PDC != -1) return; in SetOEMLCDDelay()
149 { PCI_VDEVICE(PDC, 0x2068), board_2068_idx },
160 { PCI_VDEVICE(PDC, 0x1841), board_1841_idx },
34 :title: ETS 300 231 "Specification of the domestic video Programme Delivery Control system (PDC…
87 ;* for RDR10 which has bits that preclude PDC stack operations
77 PDC, enumerator927 {"dct",{0},{PPI,PDC,HEX_1}, arch_sh_dsp_up},928 {"dcf",{0},{PPI,PDC,HEX_2}, arch_sh_dsp_up},
221 SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.
434 tristate "QCOM PDC"
155 Say Y here if you wish to use the PDC to do DMA transfers to583 /dev/ttyB0 device is shared between the Serial MUX and the PDC
1862 tristate "Imagination Technologies PDC Watchdog Timer"
3922 D: PA-RISC port minion, PDC and GSCPS2 drivers, debuglocks and other bits
4522 pdcchassis= [PARISC,HW] Disable/Enable PDC Chassis Status codes at