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Searched refs:PDC (Results 1 – 22 of 22) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Dbrcm,iproc-pdc-mbox.txt1 The PDC driver manages data transfer to and from various offload engines
2 on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is
3 one device tree entry per block. On some chips, the PDC functionality is
9 - reg: Should contain PDC registers location and length.
10 - interrupts: Should contain the IRQ line for the PDC.
20 reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dimg,pdc-intc.txt1 * ImgTec Powerdown Controller (PDC) Interrupt Controller Binding
4 representation of a PDC IRQ controller. This has a number of input interrupt
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
27 shared SysWake interrupt, and remaining specifies shall be PDC peripheral
52 * TZ1090 PDC block
82 * An SoC peripheral that is wired through the PDC.
/openbmc/linux/drivers/parisc/
H A DKconfig116 bool "PDC chassis state codes support"
134 bool "PDC chassis warnings support"
148 tristate "PDC Stable Storage support"
153 variables (PDC non volatile variables such as Primary Boot Path,
/openbmc/linux/Documentation/devicetree/bindings/watchdog/
H A Dimgpdc-wdt.txt1 *ImgTec PowerDown Controller (PDC) Watchdog Timer (WDT)
/openbmc/linux/Documentation/devicetree/bindings/misc/
H A Datmel-ssc.txt31 - PDC transfer:
/openbmc/linux/arch/arm64/boot/dts/broadcom/northstar2/
H A Dns2.dtsi219 reg = <0x612c0000 0x445>; /* PDC FS0 regs */
235 reg = <0x612e0000 0x445>; /* PDC FS1 regs */
251 reg = <0x61300000 0x445>; /* PDC FS2 regs */
267 reg = <0x61320000 0x445>; /* PDC FS3 regs */
/openbmc/linux/drivers/reset/
H A DKconfig178 tristate "Qualcomm PDC Reset Driver"
181 This enables the PDC (Power Domain Controller) reset driver
183 to control reset signals provided by PDC for Modem, Compute,
/openbmc/linux/sound/soc/atmel/
H A DKconfig25 tristate "SoC PCM DAI support for AT91 SSC controller using PDC"
31 in PDC mode configured using audio-graph-card in device-tree.
/openbmc/linux/drivers/video/fbdev/sis/
H A Dvstruct.h295 short PDC, PDCA; member
H A Dsis_main.c3007 if(ivideo->SiS_Pr.PDC == -1) { in sisfb_save_pdc_emi()
3009 ivideo->SiS_Pr.PDC = ivideo->detectedpdc; in sisfb_save_pdc_emi()
3014 if((ivideo->SiS_Pr.PDC != -1) && in sisfb_save_pdc_emi()
3015 (ivideo->SiS_Pr.PDC != ivideo->detectedpdc)) { in sisfb_save_pdc_emi()
3017 ivideo->SiS_Pr.PDC); in sisfb_save_pdc_emi()
3058 if(ivideo->SiS_Pr.PDC == -1) { in sisfb_save_pdc_emi()
3060 ivideo->SiS_Pr.PDC = ivideo->detectedpdc; in sisfb_save_pdc_emi()
3095 if((ivideo->SiS_Pr.PDC != -1) && in sisfb_save_pdc_emi()
3096 (ivideo->SiS_Pr.PDC != ivideo->detectedpdc)) { in sisfb_save_pdc_emi()
3098 ivideo->SiS_Pr.PDC); in sisfb_save_pdc_emi()
[all …]
H A Dinit301.c6510 if(SiS_Pr->PDC != -1) temp = SiS_Pr->PDC; in SiS_SetGroup1()
6524 if(SiS_Pr->PDC != -1) temp = SiS_Pr->PDC; in SiS_SetGroup1()
9991 if(SiS_Pr->PDC != -1) { in SetDelayComp()
9992 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2d,0xf0,((SiS_Pr->PDC >> 1) & 0x0f)); in SetDelayComp()
9993 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x35,0x7f,((SiS_Pr->PDC & 0x01) << 7)); in SetDelayComp()
10593 if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (SiS_Pr->PDC != -1)) { in SetDelayComp661()
10594 delay = SiS_Pr->PDC & 0x1f; in SetDelayComp661()
11080 if(SiS_Pr->PDC != -1) return; in SetOEMLCDDelay()
/openbmc/linux/drivers/ata/
H A Dsata_qstor.c149 { PCI_VDEVICE(PDC, 0x2068), board_2068_idx },
H A Dpdc_adma.c160 { PCI_VDEVICE(PDC, 0x1841), board_1841_idx },
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dbiblio.rst34 :title: ETS 300 231 "Specification of the domestic video Programme Delivery Control system (PDC
/openbmc/linux/arch/parisc/kernel/
H A Dperf_asm.S87 ;* for RDR10 which has bits that preclude PDC stack operations
/openbmc/qemu/disas/
H A Dsh4.c77 PDC, enumerator
927 {"dct",{0},{PPI,PDC,HEX_1}, arch_sh_dsp_up},
928 {"dcf",{0},{PPI,PDC,HEX_2}, arch_sh_dsp_up},
/openbmc/linux/drivers/mailbox/
H A DKconfig221 SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.
/openbmc/linux/drivers/irqchip/
H A DKconfig434 tristate "QCOM PDC"
/openbmc/linux/drivers/tty/serial/
H A DKconfig155 Say Y here if you wish to use the PDC to do DMA transfers to
583 /dev/ttyB0 device is shared between the Serial MUX and the PDC
/openbmc/linux/drivers/watchdog/
H A DKconfig1862 tristate "Imagination Technologies PDC Watchdog Timer"
/openbmc/linux/
H A DCREDITS3922 D: PA-RISC port minion, PDC and GSCPS2 drivers, debuglocks and other bits
/openbmc/linux/Documentation/admin-guide/
H A Dkernel-parameters.txt4522 pdcchassis= [PARISC,HW] Disable/Enable PDC Chassis Status codes at