1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 230058677SRob Herringmenuconfig MAILBOX 330058677SRob Herring bool "Mailbox Hardware Support" 430058677SRob Herring help 530058677SRob Herring Mailbox is a framework to control hardware communication between 630058677SRob Herring on-chip processors through queued messages and interrupt driven 730058677SRob Herring signals. Say Y if your platform supports hardware mailboxes. 830058677SRob Herring 930058677SRob Herringif MAILBOX 10ee23d66aSJassi Brar 11f89f9c56SSven Peterconfig APPLE_MAILBOX 12f89f9c56SSven Peter tristate "Apple Mailbox driver" 13f89f9c56SSven Peter depends on ARCH_APPLE || (ARM64 && COMPILE_TEST) 14f89f9c56SSven Peter default ARCH_APPLE 15f89f9c56SSven Peter help 16f89f9c56SSven Peter Apple SoCs have various co-processors required for certain 17f89f9c56SSven Peter peripherals to work (NVMe, display controller, etc.). This 18f89f9c56SSven Peter driver adds support for the mailbox controller used to 19f89f9c56SSven Peter communicate with those. 20f89f9c56SSven Peter 21f89f9c56SSven Peter Say Y here if you have a Apple SoC. 22f89f9c56SSven Peter 23ee23d66aSJassi Brarconfig ARM_MHU 24ee23d66aSJassi Brar tristate "ARM MHU Mailbox" 25ee23d66aSJassi Brar depends on ARM_AMBA 26ee23d66aSJassi Brar help 27ee23d66aSJassi Brar Say Y here if you want to build the ARM MHU controller driver. 28ee23d66aSJassi Brar The controller has 3 mailbox channels, the last of which can be 29ee23d66aSJassi Brar used in Secure mode only. 30ee23d66aSJassi Brar 315a6338ccSViresh Kumarconfig ARM_MHU_V2 325a6338ccSViresh Kumar tristate "ARM MHUv2 Mailbox" 335a6338ccSViresh Kumar depends on ARM_AMBA 345a6338ccSViresh Kumar help 355a6338ccSViresh Kumar Say Y here if you want to build the ARM MHUv2 controller driver, 365a6338ccSViresh Kumar which provides unidirectional mailboxes between processing elements. 375a6338ccSViresh Kumar 382bb70056SOleksij Rempelconfig IMX_MBOX 392bb70056SOleksij Rempel tristate "i.MX Mailbox" 402bb70056SOleksij Rempel depends on ARCH_MXC || COMPILE_TEST 412bb70056SOleksij Rempel help 422bb70056SOleksij Rempel Mailbox implementation for i.MX Messaging Unit (MU). 432bb70056SOleksij Rempel 44ad3a212cSNeil Armstrongconfig PLATFORM_MHU 45ad3a212cSNeil Armstrong tristate "Platform MHU Mailbox" 46ad3a212cSNeil Armstrong depends on OF 47ad3a212cSNeil Armstrong depends on HAS_IOMEM 48ad3a212cSNeil Armstrong help 49ad3a212cSNeil Armstrong Say Y here if you want to build a platform specific variant MHU 50ad3a212cSNeil Armstrong controller driver. 51ad3a212cSNeil Armstrong The controller has a maximum of 3 mailbox channels, the last of 52ad3a212cSNeil Armstrong which can be used in Secure mode only. 53ad3a212cSNeil Armstrong 5430058677SRob Herringconfig PL320_MBOX 5530058677SRob Herring bool "ARM PL320 Mailbox" 5630058677SRob Herring depends on ARM_AMBA 5730058677SRob Herring help 5830058677SRob Herring An implementation of the ARM PL320 Interprocessor Communication 5930058677SRob Herring Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to 6030058677SRob Herring send short messages between Highbank's A9 cores and the EnergyCore 6130058677SRob Herring Management Engine, primarily for cpufreq. Say Y here if you want 6230058677SRob Herring to use the PL320 IPCM support. 6330058677SRob Herring 648fbbfd96SMarek Behunconfig ARMADA_37XX_RWTM_MBOX 658fbbfd96SMarek Behun tristate "Armada 37xx rWTM BIU Mailbox" 668fbbfd96SMarek Behun depends on ARCH_MVEBU || COMPILE_TEST 678fbbfd96SMarek Behun depends on OF 688fbbfd96SMarek Behun help 698fbbfd96SMarek Behun Mailbox implementation for communication with the the firmware 708fbbfd96SMarek Behun running on the Cortex-M3 rWTM secure processor of the Armada 37xx 718fbbfd96SMarek Behun SOC. Say Y here if you are building for such a device (for example 728fbbfd96SMarek Behun the Turris Mox router). 738fbbfd96SMarek Behun 74c869c75cSSuman Annaconfig OMAP2PLUS_MBOX 75c869c75cSSuman Anna tristate "OMAP2+ Mailbox framework support" 769c1f2a5dSSuman Anna depends on ARCH_OMAP2PLUS || ARCH_K3 77c869c75cSSuman Anna help 78c869c75cSSuman Anna Mailbox implementation for OMAP family chips with hardware for 79c869c75cSSuman Anna interprocessor communication involving DSP, IVA1.0 and IVA2 in 80c869c75cSSuman Anna OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you 81c869c75cSSuman Anna want to use OMAP2+ Mailbox framework support. 82c869c75cSSuman Anna 83c869c75cSSuman Annaconfig OMAP_MBOX_KFIFO_SIZE 84c869c75cSSuman Anna int "Mailbox kfifo default buffer size (bytes)" 8579859094SSuman Anna depends on OMAP2PLUS_MBOX 86c869c75cSSuman Anna default 256 87c869c75cSSuman Anna help 88c869c75cSSuman Anna Specify the default size of mailbox's kfifo buffers (bytes). 89c869c75cSSuman Anna This can also be changed at runtime (via the mbox_kfifo_size 90c869c75cSSuman Anna module parameter). 9186c22f8cSAshwin Chaugule 92f70ed3b5SCaesar Wangconfig ROCKCHIP_MBOX 939d2e8b93STom Saeger bool "Rockchip Soc Integrated Mailbox Support" 94f70ed3b5SCaesar Wang depends on ARCH_ROCKCHIP || COMPILE_TEST 95f70ed3b5SCaesar Wang help 96f70ed3b5SCaesar Wang This driver provides support for inter-processor communication 97f70ed3b5SCaesar Wang between CPU cores and MCU processor on Some Rockchip SOCs. 98f70ed3b5SCaesar Wang Please check it that the Soc you use have Mailbox hardware. 99f70ed3b5SCaesar Wang Say Y here if you want to use the Rockchip Mailbox support. 100f70ed3b5SCaesar Wang 10186c22f8cSAshwin Chauguleconfig PCC 10286c22f8cSAshwin Chaugule bool "Platform Communication Channel Driver" 10386c22f8cSAshwin Chaugule depends on ACPI 104b6fc6072SAshwin Chaugule default n 10586c22f8cSAshwin Chaugule help 10686c22f8cSAshwin Chaugule ACPI 5.0+ spec defines a generic mode of communication 10786c22f8cSAshwin Chaugule between the OS and a platform such as the BMC. This medium 10886c22f8cSAshwin Chaugule (PCC) is typically used by CPPC (ACPI CPU Performance management), 10986c22f8cSAshwin Chaugule RAS (ACPI reliability protocol) and MPST (ACPI Memory power 11086c22f8cSAshwin Chaugule states). Select this driver if your platform implements the 11186c22f8cSAshwin Chaugule PCC clients mentioned above. 11286c22f8cSAshwin Chaugule 113f62092f6SLey Foon Tanconfig ALTERA_MBOX 114f62092f6SLey Foon Tan tristate "Altera Mailbox" 11559dd3f02SRichard Weinberger depends on HAS_IOMEM 116f62092f6SLey Foon Tan help 117f62092f6SLey Foon Tan An implementation of the Altera Mailbox soft core. It is used 118f62092f6SLey Foon Tan to send message between processors. Say Y here if you want to use the 119f62092f6SLey Foon Tan Altera mailbox support. 1200bae6af6SLubomir Rintel 1210bae6af6SLubomir Rintelconfig BCM2835_MBOX 1220bae6af6SLubomir Rintel tristate "BCM2835 Mailbox" 1230bae6af6SLubomir Rintel depends on ARCH_BCM2835 1240bae6af6SLubomir Rintel help 1250bae6af6SLubomir Rintel An implementation of the BCM2385 Mailbox. It is used to invoke 1260bae6af6SLubomir Rintel the services of the Videocore. Say Y here if you want to use the 1270bae6af6SLubomir Rintel BCM2835 Mailbox. 1280bae6af6SLubomir Rintel 1299ef4546cSLee Jonesconfig STI_MBOX 1309ef4546cSLee Jones tristate "STI Mailbox framework support" 1319ef4546cSLee Jones depends on ARCH_STI && OF 1329ef4546cSLee Jones help 1339ef4546cSLee Jones Mailbox implementation for STMicroelectonics family chips with 1349ef4546cSLee Jones hardware for interprocessor communication. 1359ef4546cSLee Jones 136aace66b1SNishanth Menonconfig TI_MESSAGE_MANAGER 137aace66b1SNishanth Menon tristate "Texas Instruments Message Manager Driver" 138cfc0f7a8SNishanth Menon depends on ARCH_KEYSTONE || ARCH_K3 13931c8d06eSNicolas Frayer default ARCH_K3 140aace66b1SNishanth Menon help 141aace66b1SNishanth Menon An implementation of Message Manager slave driver for Keystone 142cfc0f7a8SNishanth Menon and K3 architecture SoCs from Texas Instruments. Message Manager 143cfc0f7a8SNishanth Menon is a communication entity found on few of Texas Instrument's keystone 144cfc0f7a8SNishanth Menon and K3 architecture SoCs. These may be used for communication between 145aace66b1SNishanth Menon multiple processors within the SoC. Select this driver if your 146aace66b1SNishanth Menon platform has support for the hardware block. 147aace66b1SNishanth Menon 14841c0e939SKaihua Zhongconfig HI3660_MBOX 149f83d1cfcSDaniel Lezcano tristate "Hi3660 Mailbox" if EXPERT 150f83d1cfcSDaniel Lezcano depends on (ARCH_HISI || COMPILE_TEST) 151f83d1cfcSDaniel Lezcano depends on OF 152f83d1cfcSDaniel Lezcano default ARCH_HISI 15341c0e939SKaihua Zhong help 15441c0e939SKaihua Zhong An implementation of the hi3660 mailbox. It is used to send message 15541c0e939SKaihua Zhong between application processors and other processors/MCU/DSP. Select 15641c0e939SKaihua Zhong Y here if you want to use Hi3660 mailbox controller. 15741c0e939SKaihua Zhong 1589c384189SLeo Yanconfig HI6220_MBOX 159f83d1cfcSDaniel Lezcano tristate "Hi6220 Mailbox" if EXPERT 160f83d1cfcSDaniel Lezcano depends on (ARCH_HISI || COMPILE_TEST) 161f83d1cfcSDaniel Lezcano depends on OF 162f83d1cfcSDaniel Lezcano default ARCH_HISI 1639c384189SLeo Yan help 1649c384189SLeo Yan An implementation of the hi6220 mailbox. It is used to send message 1659c384189SLeo Yan between application processors and MCU. Say Y here if you want to 1669c384189SLeo Yan build Hi6220 mailbox controller driver. 1679c384189SLeo Yan 1688ea4484dSLee Jonesconfig MAILBOX_TEST 1698ea4484dSLee Jones tristate "Mailbox Test Client" 1708ea4484dSLee Jones depends on OF 17165d3b04aSRichard Weinberger depends on HAS_IOMEM 1728ea4484dSLee Jones help 1738ea4484dSLee Jones Test client to help with testing new Controller driver 1748ea4484dSLee Jones implementations. 1758ea4484dSLee Jones 17683d7b156SConor Dooleyconfig POLARFIRE_SOC_MAILBOX 17783d7b156SConor Dooley tristate "PolarFire SoC (MPFS) Mailbox" 17883d7b156SConor Dooley depends on HAS_IOMEM 179*5f84a056SConor Dooley depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST 18083d7b156SConor Dooley help 18183d7b156SConor Dooley This driver adds support for the PolarFire SoC (MPFS) mailbox controller. 18283d7b156SConor Dooley 18383d7b156SConor Dooley To compile this driver as a module, choose M here. the 18483d7b156SConor Dooley module will be called mailbox-mpfs. 18583d7b156SConor Dooley 18683d7b156SConor Dooley If unsure, say N. 18783d7b156SConor Dooley 18825bfee16SBjorn Anderssonconfig QCOM_APCS_IPC 18925bfee16SBjorn Andersson tristate "Qualcomm APCS IPC driver" 19025bfee16SBjorn Andersson depends on ARCH_QCOM || COMPILE_TEST 19125bfee16SBjorn Andersson help 19225bfee16SBjorn Andersson Say y here to enable support for the APCS IPC mailbox driver, 19325bfee16SBjorn Andersson providing an interface for invoking the inter-process communication 19425bfee16SBjorn Andersson signals from the application processor to other masters. 19525bfee16SBjorn Andersson 1960fe88461SThierry Redingconfig TEGRA_HSP_MBOX 1970fe88461SThierry Reding bool "Tegra HSP (Hardware Synchronization Primitives) Driver" 19885bd2de4SArnd Bergmann depends on ARCH_TEGRA 1990fe88461SThierry Reding help 2000fe88461SThierry Reding The Tegra HSP driver is used for the interprocessor communication 2010fe88461SThierry Reding between different remote processors and host processors on Tegra186 2020fe88461SThierry Reding and later SoCs. Say Y here if you want to have this support. 2030fe88461SThierry Reding If unsure say N. 2040fe88461SThierry Reding 205f700e84fSDuc Dangconfig XGENE_SLIMPRO_MBOX 206f700e84fSDuc Dang tristate "APM SoC X-Gene SLIMpro Mailbox Controller" 207f700e84fSDuc Dang depends on ARCH_XGENE 208f700e84fSDuc Dang help 209f700e84fSDuc Dang An implementation of the APM X-Gene Interprocessor Communication 210f700e84fSDuc Dang Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller. 211f700e84fSDuc Dang It is used to send short messages between ARM64-bit cores and 212f700e84fSDuc Dang the SLIMpro Management Engine, primarily for PM. Say Y here if you 213f700e84fSDuc Dang want to use the APM X-Gene SLIMpro IPCM support. 214a24532f8SRob Rice 215a24532f8SRob Riceconfig BCM_PDC_MBOX 216fc2041c5SSteve Lin tristate "Broadcom FlexSparx DMA Mailbox" 217fc2041c5SSteve Lin depends on ARCH_BCM_IPROC || COMPILE_TEST 218a24532f8SRob Rice help 219fc2041c5SSteve Lin Mailbox implementation for the Broadcom FlexSparx DMA ring manager, 220a24532f8SRob Rice which provides access to various offload engines on Broadcom 221fc2041c5SSteve Lin SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2. 222dbc049eeSAnup Patel 223dbc049eeSAnup Patelconfig BCM_FLEXRM_MBOX 224dbc049eeSAnup Patel tristate "Broadcom FlexRM Mailbox" 22573874913SAnup Patel depends on ARM64 2268f82121dSScott Branden depends on ARCH_BCM_IPROC || COMPILE_TEST 22713e7accbSThomas Gleixner select GENERIC_MSI_IRQ 22822d28b0fSAnup Patel default m if ARCH_BCM_IPROC 229dbc049eeSAnup Patel help 230dbc049eeSAnup Patel Mailbox implementation of the Broadcom FlexRM ring manager, 231dbc049eeSAnup Patel which provides access to various offload engines on Broadcom 232dbc049eeSAnup Patel SoCs. Say Y here if you want to use the Broadcom FlexRM. 233ffbded7dSFabien Dessenne 234ffbded7dSFabien Dessenneconfig STM32_IPCC 235ffbded7dSFabien Dessenne tristate "STM32 IPCC Mailbox" 236d68f1729SMartin Kaiser depends on MACH_STM32MP157 || COMPILE_TEST 237ffbded7dSFabien Dessenne help 238ffbded7dSFabien Dessenne Mailbox implementation for STMicroelectonics STM32 family chips 239ffbded7dSFabien Dessenne with hardware for Inter-Processor Communication Controller (IPCC) 240ffbded7dSFabien Dessenne between processors. Say Y here if you want to have this support. 241623a6143SHoulong Wei 242af2dfa96SAllen-KH Chengconfig MTK_ADSP_MBOX 243af2dfa96SAllen-KH Cheng tristate "MediaTek ADSP Mailbox Controller" 244af2dfa96SAllen-KH Cheng depends on ARCH_MEDIATEK || COMPILE_TEST 245af2dfa96SAllen-KH Cheng help 246af2dfa96SAllen-KH Cheng Say yes here to add support for "MediaTek ADSP Mailbox Controller. 247af2dfa96SAllen-KH Cheng This mailbox driver is used to send notification or short message 248af2dfa96SAllen-KH Cheng between processors with ADSP. It will place the message to share 249af2dfa96SAllen-KH Cheng buffer and will access the ipc control. 250af2dfa96SAllen-KH Cheng 251623a6143SHoulong Weiconfig MTK_CMDQ_MBOX 252623a6143SHoulong Wei tristate "MediaTek CMDQ Mailbox Support" 253623a6143SHoulong Wei depends on ARCH_MEDIATEK || COMPILE_TEST 254623a6143SHoulong Wei select MTK_INFRACFG 255623a6143SHoulong Wei help 256623a6143SHoulong Wei Say yes here to add support for the MediaTek Command Queue (CMDQ) 257623a6143SHoulong Wei mailbox driver. The CMDQ is used to help read/write registers with 258623a6143SHoulong Wei critical time limitation, such as updating display configuration 259623a6143SHoulong Wei during the vblank. 2604981b82bSWendy Liang 2614981b82bSWendy Liangconfig ZYNQMP_IPI_MBOX 2624f2fe396SNick Alcock tristate "Xilinx ZynqMP IPI Mailbox" 2634981b82bSWendy Liang depends on ARCH_ZYNQMP && OF 2644981b82bSWendy Liang help 2654981b82bSWendy Liang Say yes here to add support for Xilinx IPI mailbox driver. 2664981b82bSWendy Liang This mailbox driver is used to send notification or short message 2674981b82bSWendy Liang between processors with Xilinx ZynqMP IPI. It will place the 2684981b82bSWendy Liang message to the IPI buffer and will access the IPI control 2694981b82bSWendy Liang registers to kick the other processor or enquire status. 2704981b82bSWendy Liang 27125831c44SSamuel Hollandconfig SUN6I_MSGBOX 27225831c44SSamuel Holland tristate "Allwinner sun6i/sun8i/sun9i/sun50i Message Box" 27325831c44SSamuel Holland depends on ARCH_SUNXI || COMPILE_TEST 27425831c44SSamuel Holland default ARCH_SUNXI 27525831c44SSamuel Holland help 27625831c44SSamuel Holland Mailbox implementation for the hardware message box present in 27725831c44SSamuel Holland various Allwinner SoCs. This mailbox is used for communication 27825831c44SSamuel Holland between the application CPUs and the power management coprocessor. 27925831c44SSamuel Holland 280ca27fc26SBaolin Wangconfig SPRD_MBOX 281ca27fc26SBaolin Wang tristate "Spreadtrum Mailbox" 282ca27fc26SBaolin Wang depends on ARCH_SPRD || COMPILE_TEST 283ca27fc26SBaolin Wang help 284ca27fc26SBaolin Wang Mailbox driver implementation for the Spreadtrum platform. It is used 285ca27fc26SBaolin Wang to send message between application processors and MCU. Say Y here if 286ca27fc26SBaolin Wang you want to build the Spreatrum mailbox controller driver. 287ca27fc26SBaolin Wang 288fa74a025SManivannan Sadhasivamconfig QCOM_IPCC 2898d7e5908SAmit Pundir tristate "Qualcomm Technologies, Inc. IPCC driver" 290fa74a025SManivannan Sadhasivam depends on ARCH_QCOM || COMPILE_TEST 291fa74a025SManivannan Sadhasivam help 292fa74a025SManivannan Sadhasivam Qualcomm Technologies, Inc. Inter-Processor Communication Controller 293fa74a025SManivannan Sadhasivam (IPCC) driver for MSM devices. The driver provides mailbox support for 294fa74a025SManivannan Sadhasivam sending interrupts to the clients. On the other hand, the driver also 295fa74a025SManivannan Sadhasivam acts as an interrupt controller for receiving interrupts from clients. 296fa74a025SManivannan Sadhasivam Say Y here if you want to build this driver. 297fa74a025SManivannan Sadhasivam 29830058677SRob Herringendif 299