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Searched refs:MPP (Results 1 – 25 of 33) sorted by relevance

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/openbmc/u-boot/arch/arm/mach-kirkwood/include/mach/
H A Dmpp.h11 #define MPP(_num, _sel, _in, _out, _F6180, _F6190, _F6192, _F6281) ( \ macro
26 #define MPP_INPUT_MASK MPP( 0, 0x0, 1, 0, 0, 0, 0, 0 )
27 #define MPP_OUTPUT_MASK MPP( 0, 0x0, 0, 1, 0, 0, 0, 0 )
29 #define MPP_F6180_MASK MPP( 0, 0x0, 0, 0, 1, 0, 0, 0 )
30 #define MPP_F6190_MASK MPP( 0, 0x0, 0, 0, 0, 1, 0, 0 )
31 #define MPP_F6192_MASK MPP( 0, 0x0, 0, 0, 0, 0, 1, 0 )
32 #define MPP_F6281_MASK MPP( 0, 0x0, 0, 0, 0, 0, 0, 1 )
34 #define MPP0_GPIO MPP( 0, 0x0, 1, 1, 1, 1, 1, 1 )
35 #define MPP0_NF_IO2 MPP( 0, 0x1, 1, 1, 1, 1, 1, 1 )
36 #define MPP0_SPI_SCn MPP( 0, 0x2, 0, 1, 1, 1, 1, 1 )
[all …]
/openbmc/linux/arch/arm/mach-mv78xx0/
H A Dmpp.h11 #define MPP(_num, _sel, _in, _out, _78100_A0) (\ macro
20 #define MPP_78100_A0_MASK MPP(0, 0x0, 0, 0, 1)
22 #define MPP0_GPIO MPP(0, 0x0, 1, 1, 1)
23 #define MPP0_GE0_COL MPP(0, 0x1, 0, 0, 1)
24 #define MPP0_GE1_TXCLK MPP(0, 0x2, 0, 0, 1)
25 #define MPP0_UNUSED MPP(0, 0x3, 0, 0, 1)
27 #define MPP1_GPIO MPP(1, 0x0, 1, 1, 1)
28 #define MPP1_GE0_RXERR MPP(1, 0x1, 0, 0, 1)
29 #define MPP1_GE1_TXCTL MPP(1, 0x2, 0, 0, 1)
30 #define MPP1_UNUSED MPP(1, 0x3, 0, 0, 1)
[all …]
/openbmc/linux/arch/arm/mach-dove/
H A Dmpp.h5 #define MPP(_num, _sel, _in, _out) ( \ macro
11 #define MPP0_GPIO0 MPP(0, 0x0, 1, 1)
12 #define MPP0_UA2_RTSn MPP(0, 0x2, 0, 0)
13 #define MPP0_SDIO0_CD MPP(0, 0x3, 0, 0)
14 #define MPP0_LCD0_PWM MPP(0, 0xf, 0, 0)
16 #define MPP1_GPIO1 MPP(1, 0x0, 1, 1)
17 #define MPP1_UA2_CTSn MPP(1, 0x2, 0, 0)
18 #define MPP1_SDIO0_WP MPP(1, 0x3, 0, 0)
19 #define MPP1_LCD1_PWM MPP(1, 0xf, 0, 0)
21 #define MPP2_GPIO2 MPP(2, 0x0, 1, 1)
[all …]
/openbmc/linux/arch/arm/mach-orion5x/
H A Dmpp.h5 #define MPP(_num, _sel, _in, _out, _F5181l, _F5182, _F5281) ( \ macro
16 #define MPP_F5181_MASK MPP(0, 0x0, 0, 0, 1, 0, 0)
17 #define MPP_F5182_MASK MPP(0, 0x0, 0, 0, 0, 1, 0)
18 #define MPP_F5281_MASK MPP(0, 0x0, 0, 0, 0, 0, 1)
20 #define MPP0_UNUSED MPP(0, 0x3, 0, 0, 1, 1, 1)
21 #define MPP0_GPIO MPP(0, 0x3, 1, 1, 1, 1, 1)
22 #define MPP0_PCIE_RST_OUTn MPP(0, 0x0, 0, 0, 1, 1, 1)
23 #define MPP0_PCI_ARB MPP(0, 0x2, 0, 0, 1, 1, 1)
25 #define MPP1_UNUSED MPP(1, 0x0, 0, 0, 1, 1, 1)
26 #define MPP1_GPIO MPP(1, 0x0, 1, 1, 1, 1, 1)
[all …]
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dorion5x-rd88f5182-nas.dts130 * MPP[20] PCI Clock to MV88F5182
131 * MPP[21] PCI Clock to mini PCI CON11
132 * MPP[22] USB 0 over current indication
133 * MPP[23] USB 1 over current indication
134 * MPP[24] USB 1 over current enable
135 * MPP[25] USB 0 over current enable
H A Dkirkwood-openblocks_a7.dts81 * Accessible on connector J202. The MPP
H A Dorion5x-maxtor-shared-storage-2.dts159 * Non MPP GPIOs:
/openbmc/u-boot/doc/device-tree-bindings/pinctrl/
H A Dmarvell,armada-cp110-pinctrl.txt2 Function 0x0 for any MPP ID activates GPIO pin mode
3 Function 0xc for any MPP ID activates DEBUG_BUS pin mode
5 MPP# 0x1 0x2 0x3 0x4
72 MPP# 0x5 0x6 0x7
139 MPP# 0x8 0x9 0xA
206 MPP# 0xB 0xD 0xE
H A Dmarvell,armada-apn806-pinctrl.txt2 Function 0x0 for any MPP ID activates GPIO pin mode
4 MPP# 0x1 0x2 0x3 0x4
H A Dmarvell,mvebu-pinctrl.txt39 /* MPP Bus:
61 /* MPP Bus:
97 /* MPP Bus:
/openbmc/u-boot/board/Synology/ds109/
H A Dopenocd.cfg105 mww 0xD0010000 0x01111111 ;# MPP 0 to 7
106 mww 0xD0010004 0x11113322 ;# MPP 8 to 15
107 mww 0xD0010008 0x00001111 ;# MPP 16 to 23
/openbmc/u-boot/board/keymile/km_arm/
H A Dkwbimage_256M8_1.cfg19 DATA 0xFFD10000 0x01112222 # MPP Control 0 Register
29 DATA 0xFFD10004 0x03303300 # MPP Control 1 Register
39 DATA 0xFFD10008 0x00001100 # MPP Control 2 Register
49 # MPP Control 3-6 Register untouched (MPP24-49)
59 # bit 15: 0, MPP RGMII-pads voltage = 3.3V
H A Dkwbimage_128M16_1.cfg19 DATA 0xFFD10000 0x01112222 # MPP Control 0 Register
29 DATA 0xFFD10004 0x03303300 # MPP Control 1 Register
39 DATA 0xFFD10008 0x00001100 # MPP Control 2 Register
49 # MPP Control 3-6 Register untouched (MPP24-49)
59 # bit 15: 0, MPP RGMII-pads voltage = 3.3V
H A Dkwbimage.cfg12 DATA 0xFFD10000 0x01112222 # MPP Control 0 Register
24 DATA 0xFFD10008 0x00001100 # MPP Control 2 Register
H A Dkwbimage-memphis.cfg15 DATA 0xFFD10000 0x01112222 # MPP Control 0 Register
27 DATA 0xFFD10008 0x00001100 # MPP Control 2 Register
/openbmc/u-boot/arch/arm/dts/
H A Darmada-8040-mcbin.dts59 * MPP Bus:
78 * MPP Bus:
218 * MPP Bus:
H A Darmada-8040-clearfog-gt-8k.dts52 * MPP Bus:
71 * MPP Bus:
208 * MPP Bus:
H A Darmada-8040-db.dts75 /* MPP Bus:
92 /* MPP Bus:
200 /* MPP Bus:
H A Darmada-7040-db.dts71 /* MPP Bus:
97 /* MPP Bus:
H A Darmada-7040-db-nand.dts72 /* MPP Bus:
98 /* MPP Bus:
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,orion-pinctrl.txt13 contiguous MPP registers, and the second one describing the single
14 final MPP register, separated from the previous one.
H A Dmarvell,dove-pinctrl.txt9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
H A Dmarvell,armada-98dx3236-pinctrl.txt8 - reg: register specifier of MPP registers
/openbmc/linux/drivers/pinctrl/qcom/
H A DKconfig31 Qualcomm GPIO and MPP blocks found in the Qualcomm PMIC's chips,
46 Qualcomm GPIO and MPP blocks found in the Qualcomm PMIC's chips,
/openbmc/linux/Documentation/devicetree/bindings/rtc/
H A Disil,isl12057.txt40 SoC, and the main function of the MPP used as IRQ line, i.e.

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