xref: /openbmc/u-boot/doc/device-tree-bindings/pinctrl/marvell,armada-apn806-pinctrl.txt (revision f2465934b46235287e07473fa4919035ba1a2b68)
1*656e6cc8SKonstantin Porotchkin	Functions of Armada APN806 pin controller
2*656e6cc8SKonstantin Porotchkin	Function 0x0 for any MPP ID activates GPIO pin mode
3*656e6cc8SKonstantin Porotchkin----------------------------------------------------------------------
4*656e6cc8SKonstantin PorotchkinMPP#	0x1			0x2		0x3		0x4
5*656e6cc8SKonstantin Porotchkin----------------------------------------------------------------------
6*656e6cc8SKonstantin Porotchkin0	SDIO_CLK		-		SPI0_CLK 	-
7*656e6cc8SKonstantin Porotchkin1	SDIO_CMD		-		SPI0_MISO	-
8*656e6cc8SKonstantin Porotchkin2	SDIO_D[0]		-		SPI0_MOSI 	-
9*656e6cc8SKonstantin Porotchkin3	SDIO_D[1]		-		SPI0_CS0n 	-
10*656e6cc8SKonstantin Porotchkin4	SDIO_D[2]		-		I2C0_SDA	SPI0_CS1n
11*656e6cc8SKonstantin Porotchkin5	SDIO_D[3]		-		I2C0_SCK	-
12*656e6cc8SKonstantin Porotchkin6	SDIO_DS			-		-		-
13*656e6cc8SKonstantin Porotchkin7	SDIO_D[4]		-		UART1_RXD	-
14*656e6cc8SKonstantin Porotchkin8	SDIO_D[5]		-		UART1_TXD 	-
15*656e6cc8SKonstantin Porotchkin9	SDIO_D[6]		-		SPI0_CS1n 	-
16*656e6cc8SKonstantin Porotchkin10	SDIO_D[7]		-		-		-
17*656e6cc8SKonstantin Porotchkin11	-			-		UART0_TXD 	-
18*656e6cc8SKonstantin Porotchkin12	SDIO_CARD_PW_OFF 	SDIO_HW_RST 	-		-
19*656e6cc8SKonstantin Porotchkin13	-			-		-		-
20*656e6cc8SKonstantin Porotchkin14	-			-		-		-
21*656e6cc8SKonstantin Porotchkin15	-			-		-		-
22*656e6cc8SKonstantin Porotchkin16	-			-		-		-
23*656e6cc8SKonstantin Porotchkin17	-			-		-		-
24*656e6cc8SKonstantin Porotchkin18	-			-		-		-
25*656e6cc8SKonstantin Porotchkin19	-			-		UART0_RXD	-
26