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Searched refs:IOMMU_WO (Results 1 – 14 of 14) sorted by relevance

/openbmc/qemu/hw/arm/
H A Dsmmu-internal.h76 (((perm) & IOMMU_WO) && ((ap) & 0x2))
H A Dsmmu-common.c782 if ((flag & IOMMU_WO) && !(cached_entry->entry.perm & in smmu_translate()
783 cached_entry->parent_perm & IOMMU_WO)) { in smmu_translate()
785 info->stage = !(cached_entry->entry.perm & IOMMU_WO) ? in smmu_translate()
/openbmc/qemu/hw/riscv/
H A Driscv-iommu.c292 if (!en_s && (iotlb->perm & IOMMU_WO) && in riscv_iommu_spa_fetch()
412 return (iotlb->perm & IOMMU_WO) ? RISCV_IOMMU_FQ_CAUSE_WR_FAULT in riscv_iommu_spa_fetch()
431 } else if ((iotlb->perm & IOMMU_WO) && !(pte & PTE_W)) { in riscv_iommu_spa_fetch()
435 } else if ((iotlb->perm & IOMMU_WO) && !ade && !(pte & PTE_D)) { in riscv_iommu_spa_fetch()
451 iotlb->perm = (pte & PTE_W) ? ((pte & PTE_R) ? IOMMU_RW : IOMMU_WO) in riscv_iommu_spa_fetch()
455 if (pass == S_STAGE && (iotlb->perm & IOMMU_WO) && in riscv_iommu_spa_fetch()
488 return (iotlb->perm & IOMMU_WO) ? in riscv_iommu_spa_fetch()
/openbmc/qemu/hw/sparc/
H A Dsun4m_iommu.c294 int is_write = (flags & IOMMU_WO) ? 1 : 0; in sun4m_translate_iommu()
/openbmc/qemu/hw/virtio/
H A Dvhost-backend.c372 case IOMMU_WO: in vhost_backend_update_device_iotlb()
H A Dvirtio-iommu.c1240 write_fault = (flag & IOMMU_WO) && in virtio_iommu_translate()
/openbmc/qemu/include/exec/
H A Dmemory.h117 IOMMU_WO = 2, enumerator
121 #define IOMMU_ACCESS_FLAG(r, w) (((r) ? IOMMU_RO : 0) | ((w) ? IOMMU_WO : 0))
/openbmc/qemu/hw/ppc/
H A Dspapr_iommu.c74 return IOMMU_WO; in spapr_tce_iommu_access_flags()
/openbmc/qemu/hw/i386/
H A Damd_iommu.c1058 ret.perm = IOMMU_WO; in amdvi_translate()
1062 amdvi_do_translate(as, addr, flag & IOMMU_WO, &ret); in amdvi_translate()
H A Dintel_iommu.c3273 addr, flag & IOMMU_WO, &iotlb); in vtd_iommu_translate()
/openbmc/qemu/hw/pci-host/
H A Dpnv_phb3.c875 pnv_phb3_translate_tve(ds, addr, flag & IOMMU_WO, tve, &ret); in pnv_phb3_translate_iommu()
H A Dpnv_phb4.c1349 pnv_phb4_translate_tve(ds, addr, flag & IOMMU_WO, tve, &ret); in pnv_phb4_translate_iommu()
/openbmc/qemu/system/
H A Dphysmem.c438 IOMMU_WO : IOMMU_RO, iommu_idx); in address_space_translate_iommu()
712 if (!(iotlb.perm & IOMMU_WO)) { in address_space_translate_for_iotlb()
H A Dmemory.c2322 bool writable = iotlb->perm & IOMMU_WO; in memory_get_xlat_addr()