Searched refs:FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT (Results 1 – 9 of 9) sorted by relevance
49 cfg >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT; in serdes_get_first_lane()80 cfg >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT; in get_serdes_protocol()177 cfg_tmp >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT; in setup_serdes_volt()358 cfg_tmp >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT; in setup_serdes_volt()409 FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT, in fsl_serdes_init()
27 srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT; in board_eth_init()89 srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT; in fdt_update_ethernet_dt()
27 srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT; in board_eth_init()
50 srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT; in pfe_eth_board_init()
263 srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT; in fdt_fixup_board_enet()305 srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT; in board_eth_init()
200 srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT; in fdt_fsl_fixup_of_pfe()
141 srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT; in pfe_eth_board_init()
278 srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT; in board_eth_init()
283 #define FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT 16 macro