Searched refs:DSISR (Results 1 – 10 of 10) sorted by relevance
| /openbmc/linux/arch/powerpc/kernel/ |
| H A D | head_32.h | 35 stw r11, DSISR(r10)
94 lwz r10, DSISR(r12)
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| H A D | head_8xx.S | 507 stw r10, DSISR(r11)
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| H A D | asm-offsets.c | 130 OFFSET(DSISR, thread_struct, dsisr); in main()
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| /openbmc/qemu/target/ppc/ |
| H A D | trace-events | 34 ppc_excp_dsi(uint64_t dsisr, uint64_t dar) "DSI exception: DSISR=0x%" PRIx64 " DAR=0x%" PRIx64
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| /openbmc/linux/Documentation/powerpc/ |
| H A D | cxl.rst | 368 copy of the DSISR from the PSL hardware when the address
369 fault occurred. The form of the DSISR is as defined in the
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| /openbmc/u-boot/arch/powerpc/cpu/mpc8xx/ |
| H A D | start.S | 204 mfspr r5,DSISR
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| /openbmc/u-boot/arch/powerpc/include/asm/ |
| H A D | processor.h | 620 #define DSISR SPRN_DSISR /* Data Storage Interrupt Status Register */ macro
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| /openbmc/u-boot/arch/powerpc/cpu/mpc86xx/ |
| H A D | start.S | 89 mfspr r5,DSISR
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| /openbmc/u-boot/arch/powerpc/cpu/mpc83xx/ |
| H A D | start.S | 334 mfspr r5,DSISR
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| /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | start.S | 1264 mfspr r5,DSISR
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