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Searched refs:DEV_CLOCK_CFG (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/net/ethernet/microchip/lan966x/
H A Dlan966x_port.c56 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_down()
122 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_down()
132 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_down()
262 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_up()
391 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_pcs_set()
570 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_init()
H A Dlan966x_phylink.c82 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_phylink_mac_link_down()
H A Dlan966x_regs.h713 #define DEV_CLOCK_CFG(t) __REG(TARGET_DEV, t, 8, 0, 0, 1, 28, 0, 0, 1, 4) macro
/openbmc/u-boot/drivers/net/mscc_eswitch/
H A Docelot_switch.c57 #define DEV_CLOCK_CFG 0x0 macro
298 writel(DEV_CLOCK_CFG_LINK_SPEED_1000, regs + DEV_CLOCK_CFG); in ocelot_port_init()
/openbmc/linux/drivers/net/ethernet/mscc/
H A Dvsc7514_regs.c383 REG(DEV_CLOCK_CFG, 0x0),
H A Docelot.c826 DEV_CLOCK_CFG); in ocelot_port_configure_serdes()
913 DEV_CLOCK_CFG); in ocelot_phylink_mac_link_down()
958 DEV_CLOCK_CFG); in ocelot_phylink_mac_link_up()
/openbmc/linux/drivers/net/dsa/ocelot/
H A Dseville_vsc9953.c407 REG(DEV_CLOCK_CFG, 0x0),
H A Dfelix_vsc9959.c463 REG(DEV_CLOCK_CFG, 0x0),
/openbmc/linux/include/soc/mscc/
H A Docelot.h502 DEV_CLOCK_CFG = DEV_GMII << TARGET_OFFSET, enumerator