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Searched refs:CPU_MRVL_ID_OFFSET (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_init.c381 reg_bit_set(CPU_CONFIGURATION_REG(3), CPU_MRVL_ID_OFFSET); in ddr3_init_main()
382 reg_bit_set(CPU_CONFIGURATION_REG(2), CPU_MRVL_ID_OFFSET); in ddr3_init_main()
384 reg_bit_set(CPU_CONFIGURATION_REG(1), CPU_MRVL_ID_OFFSET); in ddr3_init_main()
386 reg_bit_set(CPU_CONFIGURATION_REG(0), CPU_MRVL_ID_OFFSET); in ddr3_init_main()
H A Dddr3_axp.h31 #define CPU_MRVL_ID_OFFSET 0x10 macro
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_plat.c1222 reg_bit_set(CPU_CONFIGURATION_REG(3), CPU_MRVL_ID_OFFSET); in mv_ddr_pre_training_soc_config()
1223 reg_bit_set(CPU_CONFIGURATION_REG(2), CPU_MRVL_ID_OFFSET); in mv_ddr_pre_training_soc_config()
1226 reg_bit_set(CPU_CONFIGURATION_REG(1), CPU_MRVL_ID_OFFSET); in mv_ddr_pre_training_soc_config()
1229 reg_bit_set(CPU_CONFIGURATION_REG(0), CPU_MRVL_ID_OFFSET); in mv_ddr_pre_training_soc_config()
H A Dmv_ddr_plat.h73 #define CPU_MRVL_ID_OFFSET 0x10 macro