Searched refs:CP0_VPEConf0 (Results 1 – 6 of 6) sorted by relevance
120 if (!(env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP))) { in mips_cpu_map_tc()519 if (env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) { in helper_mtc0_mvpcontrol()581 return other->CP0_VPEConf0; in helper_mftc0_vpeconf0()589 if (env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) { in helper_mtc0_vpeconf0()590 if (env->CP0_VPEConf0 & (1 << CP0VPEC0_VPA)) { in helper_mtc0_vpeconf0()595 newval = (env->CP0_VPEConf0 & ~mask) | (arg1 & mask); in helper_mtc0_vpeconf0()599 env->CP0_VPEConf0 = newval; in helper_mtc0_vpeconf0()610 newval = (other->CP0_VPEConf0 & ~mask) | (arg1 & mask); in helper_mttc0_vpeconf0()613 other->CP0_VPEConf0 = newval; in helper_mttc0_vpeconf0()
256 if (!(env->CP0_VPEConf0 & (1 << CP0VPEC0_VPA))) { in mips_vpe_active()
566 int32_t CP0_VPEConf0; member
345 env->CP0_VPEConf0 |= (1 << CP0VPEC0_MVP) | (1 << CP0VPEC0_VPA); in mips_cpu_reset_hold()
255 VMSTATE_INT32(env.CP0_VPEConf0, MIPSCPU),
5152 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEConf0)); in gen_mfc0()6659 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEConf0)); in gen_dmfc0()8069 if ((env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) == 0 && in gen_mftr()8294 if ((env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) == 0 && in gen_mttr()