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Searched refs:CP0_SRSCtl (Results 1 – 7 of 7) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu.c223 env->CP0_SRSCtl = env->cpu_model->CP0_SRSCtl; in mips_cpu_reset_hold()
H A Dinternal.h62 int32_t CP0_SRSCtl; member
H A Dcpu.h790 int32_t CP0_SRSCtl; member
H A Dcpu-defs.c.inc299 .CP0_SRSCtl = (0xf << CP0SRSCtl_HSS),
/openbmc/qemu/target/mips/sysemu/
H A Dmachine.c293 VMSTATE_INT32(env.CP0_SRSCtl, MIPSCPU),
/openbmc/qemu/target/mips/tcg/sysemu/
H A Dcp0_helper.c1179 env->CP0_SRSCtl = (env->CP0_SRSCtl & ~mask) | (arg1 & mask); in helper_mtc0_srsctl()
/openbmc/qemu/target/mips/tcg/
H A Dtranslate.c1240 tcg_gen_ld_i32(t2, tcg_env, offsetof(CPUMIPSState, CP0_SRSCtl)); in gen_load_srsgpr()
1260 tcg_gen_ld_i32(t2, tcg_env, offsetof(CPUMIPSState, CP0_SRSCtl)); in gen_store_srsgpr()
5477 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSCtl)); in gen_mfc0()
6956 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSCtl)); in gen_dmfc0()