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Searched refs:CP0_Config3 (Results 1 – 11 of 11) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu-defs.c.inc67 .CP0_Config3 = MIPS_CONFIG3,
89 .CP0_Config3 = MIPS_CONFIG3,
109 .CP0_Config3 = MIPS_CONFIG3,
129 .CP0_Config3 = MIPS_CONFIG3,
149 .CP0_Config3 = MIPS_CONFIG3,
170 .CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt),
191 .CP0_Config3 = MIPS_CONFIG3,
212 .CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt),
234 .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSPP) | (0 << CP0C3_VInt),
256 .CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt),
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H A Dcpu.c109 env->CP0_Config2, env->CP0_Config3); in mips_cpu_dump_state()
207 env->CP0_Config3 = env->cpu_model->CP0_Config3; in mips_cpu_reset_hold()
272 if (env->CP0_Config3 & (1 << CP0C3_DSPP)) { in mips_cpu_reset_hold()
299 if (env->CP0_Config3 & (1 << CP0C3_CMGCR)) { in mips_cpu_reset_hold()
404 if (env->CP0_Config3 & (1 << CP0C3_ISA) & (1 << (CP0C3_ISA + 1))) { in mips_cpu_reset_hold()
674 return (mcc->cpu_def->CP0_Config3 & (1 << CP0C3_CMGCR)) != 0; in cpu_type_supports_cps_smp()
H A Dinternal.h38 int32_t CP0_Config3; member
191 if (env->CP0_Config3 & (1 << CP0C3_VEIC)) { in cpu_mips_hw_interrupts_pending()
411 if (env->CP0_Config3 & (1 << CP0C3_LPA)) { in compute_hflags()
H A Dcpu.h883 int32_t CP0_Config3; member
1330 return env->CP0_Config3 & (1 << CP0C3_MSAP); in ase_msa_available()
1342 return env->CP0_Config3 & (1 << CP0C3_MT); in ase_mt_available()
H A Dkvm.c108 env->CP0_Config3 &= ~(1 << CP0C3_MSAP); in kvm_mips_reset_vcpu()
890 &env->CP0_Config3, in kvm_mips_put_cp0_registers()
1103 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG3, &env->CP0_Config3); in kvm_mips_get_cp0_registers()
/openbmc/qemu/target/mips/tcg/
H A Dtranslate.h28 int32_t CP0_Config3; member
236 return ctx->CP0_Config3 & (1 << CP0C3_MT); in disas_mt_available()
H A Dtranslate.c1661 if (unlikely(!(ctx->CP0_Config3 & (1 << CP0C3_PW)))) { in check_pw()
1673 if (unlikely(!(ctx->CP0_Config3 & (1 << CP0C3_MT)))) { in check_mt()
1690 if (unlikely(!(ctx->CP0_Config3 & (1 << CP0C3_MT)))) { in check_cp0_mt()
5548 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config3)); in gen_mfc0()
7024 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config3)); in gen_dmfc0()
15072 ctx->CP0_Config3 = env->CP0_Config3; in mips_tr_init_disas_context()
15076 ctx->rxi = (env->CP0_Config3 >> CP0C3_RXI) & 1; in mips_tr_init_disas_context()
15078 ctx->bi = (env->CP0_Config3 >> CP0C3_BI) & 1; in mips_tr_init_disas_context()
15079 ctx->bp = (env->CP0_Config3 >> CP0C3_BP) & 1; in mips_tr_init_disas_context()
15083 ctx->sc = (env->CP0_Config3 >> CP0C3_SC) & 1; in mips_tr_init_disas_context()
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/openbmc/qemu/target/mips/tcg/sysemu/
H A Dtlb_helper.c748 if (!(env->CP0_Config3 & (1 << CP0C3_PW))) { in page_table_walk_refill()
992 env->hflags |= (!!(env->CP0_Config3 & in set_hflags_for_handler()
1001 if (env->CP0_Config3 & (1 << CP0C3_BI)) { in set_badinstr_registers()
1020 if (env->CP0_Config3 & (1 << CP0C3_BI)) { in set_badinstr_registers()
1023 if ((env->CP0_Config3 & (1 << CP0C3_BP)) && in set_badinstr_registers()
1141 if (env->CP0_Config3 & (1 << CP0C3_VEIC)) { in mips_cpu_do_interrupt()
1314 } else if (cause == 30 && !(env->CP0_Config3 & (1 << CP0C3_SC) && in mips_cpu_do_interrupt()
H A Dcp0_helper.c1061 if (env->CP0_Config3 & (1 << CP0C3_ULRI)) { in helper_mtc0_hwrena()
1240 case 3: return other->CP0_Config3; in helper_mftc0_configx()
1264 env->CP0_Config3 = (env->CP0_Config3 & ~(1 << CP0C3_ISA_ON_EXC)) | in helper_mtc0_config3()
/openbmc/qemu/target/mips/sysemu/
H A Dmachine.c303 VMSTATE_INT32(env.CP0_Config3, MIPSCPU),
/openbmc/qemu/linux-user/
H A Delfload.c1498 GET_FEATURE_REG_SET(CP0_Config3, 1 << CP0C3_MSAP, HWCAP_MIPS_MSA); in get_elf_hwcap()