/openbmc/u-boot/include/configs/ |
H A D | TQM834x.h | 210 #define CONFIG_SYS_PCI1_MEM_BASE 0x90000000 macro 211 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE 214 (CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE) 227 #define PCI_ENET0_MEMADDR CONFIG_SYS_PCI1_MEM_BASE 343 #define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI1_MEM_BASE \ 346 #define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI1_MEM_BASE \
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H A D | MPC8349ITX.h | 361 #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 macro 362 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE 365 (CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE) 546 #define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE \ 549 #define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \
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H A D | ve8313.h | 248 #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 macro 249 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE 373 #define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW) 374 #define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \
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H A D | vme8349.h | 225 #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 macro 226 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE 408 #define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW | \ 410 #define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE | BATU_BL_256M | \
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H A D | sbc8349.h | 290 #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 macro 291 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE 497 #define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE \ 500 #define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \
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H A D | MPC8313ERDB.h | 364 #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 macro 365 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE 538 #define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW) 539 #define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \
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H A D | MPC8349EMDS.h | 344 #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 macro 345 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE 584 #define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE \ 587 #define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \
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H A D | socrates.h | 206 #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 macro 207 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
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H A D | MPC8323ERDB.h | 235 #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 macro 236 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
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H A D | MPC832XEMDS.h | 311 #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 macro 312 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
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/openbmc/u-boot/board/sbc8349/ |
H A D | pci.c | 20 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
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/openbmc/u-boot/board/tqc/tqm834x/ |
H A D | pci.c | 18 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
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/openbmc/u-boot/board/freescale/mpc8349itx/ |
H A D | pci.c | 17 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
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/openbmc/u-boot/board/esd/vme8349/ |
H A D | pci.c | 24 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
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/openbmc/u-boot/board/freescale/mpc8313erdb/ |
H A D | mpc8313erdb.c | 56 .bus_start = CONFIG_SYS_PCI1_MEM_BASE,
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/openbmc/u-boot/board/freescale/mpc832xemds/ |
H A D | pci.c | 20 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
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/openbmc/u-boot/board/freescale/mpc8349emds/ |
H A D | pci.c | 16 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
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/openbmc/u-boot/board/freescale/mpc8323erdb/ |
H A D | mpc8323erdb.c | 140 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
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/openbmc/u-boot/board/ve8313/ |
H A D | ve8313.c | 153 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
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/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
H A D | pci.c | 18 #define CONFIG_SYS_PCI1_MEM_BUS CONFIG_SYS_PCI1_MEM_BASE
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/openbmc/u-boot/scripts/ |
H A D | config_whitelist.txt | 3748 CONFIG_SYS_PCI1_MEM_BASE
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