| /openbmc/u-boot/board/freescale/mpc832xemds/ |
| H A D | pci.c | 27 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
74 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
132 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
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| /openbmc/u-boot/board/sbc8349/ |
| H A D | pci.c | 27 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
62 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
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| /openbmc/u-boot/board/freescale/mpc8349emds/ |
| H A D | pci.c | 23 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
138 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
162 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
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| /openbmc/u-boot/board/tqc/tqm834x/ |
| H A D | pci.c | 25 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
90 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
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| /openbmc/u-boot/board/xes/xpedite520x/ |
| H A D | tlb.c | 62 SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_IO_PHYS, CONFIG_SYS_PCI1_IO_PHYS,
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| /openbmc/u-boot/board/freescale/mpc8349itx/ |
| H A D | pci.c | 24 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
92 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
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| /openbmc/u-boot/board/esd/vme8349/ |
| H A D | pci.c | 31 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
101 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
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| /openbmc/u-boot/board/freescale/mpc8313erdb/ |
| H A D | mpc8313erdb.c | 69 .phys_start = CONFIG_SYS_PCI1_IO_PHYS,
91 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
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| /openbmc/u-boot/include/configs/ |
| H A D | MPC8610HPCD.h | 230 #define CONFIG_SYS_PCI1_IO_PHYS 0xe1000000 macro
307 #define CONFIG_SYS_DBAT2L (CONFIG_SYS_PCI1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT \
310 #define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
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| H A D | MPC8548CDS.h | 340 #define CONFIG_SYS_PCI1_IO_PHYS 0xfe2000000ull macro
342 #define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 macro
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| H A D | MPC8536DS.h | 389 #define CONFIG_SYS_PCI1_IO_PHYS 0xfffc00000ull macro
391 #define CONFIG_SYS_PCI1_IO_PHYS 0xffc00000 macro
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| H A D | MPC8349ITX.h | 369 #define CONFIG_SYS_PCI1_IO_PHYS 0xE2000000 macro
383 (CONFIG_SYS_PCI1_IO_PHYS + CONFIG_SYS_PCI1_IO_SIZE)
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| H A D | MPC8541CDS.h | 264 #define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 macro
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| H A D | MPC8555CDS.h | 262 #define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 macro
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| H A D | MPC8540ADS.h | 238 #define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 macro
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| H A D | socrates.h | 210 #define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE macro
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| H A D | MPC8568MDS.h | 239 #define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 macro
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| /openbmc/u-boot/board/freescale/mpc8323erdb/ |
| H A D | mpc8323erdb.c | 153 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
173 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
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| /openbmc/u-boot/board/ve8313/ |
| H A D | ve8313.c | 166 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
188 out_be32(&pci_law[1].bar, CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR); in pci_init_board()
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| /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | pci.c | 91 pcix->powbar2 = (CONFIG_SYS_PCI1_IO_PHYS >> 12) & 0x000fffff; in pci_mpc85xx_init()
114 CONFIG_SYS_PCI1_IO_PHYS, in pci_mpc85xx_init()
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| /openbmc/u-boot/board/freescale/mpc8555cds/ |
| H A D | law.c | 35 SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI),
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| /openbmc/u-boot/board/freescale/mpc8541cds/ |
| H A D | law.c | 35 SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI),
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| /openbmc/u-boot/board/socrates/ |
| H A D | law.c | 36 SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI),
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| /openbmc/u-boot/board/freescale/mpc8548cds/ |
| H A D | tlb.c | 73 SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_IO_VIRT, CONFIG_SYS_PCI1_IO_PHYS,
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| /openbmc/u-boot/board/freescale/mpc8536ds/ |
| H A D | tlb.c | 49 SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_IO_VIRT, CONFIG_SYS_PCI1_IO_PHYS,
|