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Searched refs:CONFIG_SYS_INIT_L2_ADDR (Results 1 – 25 of 27) sorted by relevance

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/openbmc/u-boot/include/configs/
H A DC29XPCIE.h298 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
299 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
301 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
303 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
304 #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024)
306 #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
309 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
310 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
312 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
314 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
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H A DP1022DS.h302 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
303 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
305 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
307 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
308 #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
310 #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
313 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
314 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
316 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
318 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
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H A DP1010RDB.h491 #define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 macro
492 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
494 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
496 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
497 #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
499 #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 96 * 1024)
502 #define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 macro
503 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
505 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
507 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
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H A Dp1_p2_rdb_pc.h503 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
504 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
505 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
507 #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
508 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
509 #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
517 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
518 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
519 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
521 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
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H A DMPC8569MDS.h58 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
59 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
61 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
165 #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR)
167 (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE)
H A DMPC8536DS.h68 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
72 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
75 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
280 #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR)
282 (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE)
H A DMPC8572DS.h58 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
62 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
65 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
283 #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR)
285 (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE)
H A Dcontrolcenterd.h63 #define CONFIG_SYS_INIT_L2_ADDR 0xf8fc0000 macro
67 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
70 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
H A Dsbc8548.h368 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 /* relocate boot L2SRAM */ macro
/openbmc/u-boot/board/freescale/mpc8536ds/
H A Dtlb.c58 #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
60 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
63 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
/openbmc/u-boot/board/freescale/mpc8569mds/
H A Dtlb.c82 #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
84 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
87 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
/openbmc/u-boot/board/Arcturus/ucp1020/
H A Dtlb.c86 #ifdef CONFIG_SYS_INIT_L2_ADDR
88 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
92 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
H A Dspl.c83 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; in board_init_r()
/openbmc/u-boot/board/freescale/mpc8572ds/
H A Dtlb.c74 #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
76 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR,
80 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
/openbmc/u-boot/board/freescale/p1_p2_rdb_pc/
H A Dtlb.c96 #ifdef CONFIG_SYS_INIT_L2_ADDR
98 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
102 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
H A Dspl.c75 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; in board_init_r()
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dspl_minimal.c16 #ifdef CONFIG_SYS_INIT_L2_ADDR in cpu_init_f()
19 out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR); in cpu_init_f()
H A Dcpu_init.c602 #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR) in l2cache_init()
659 #if defined(CONFIG_SYS_INIT_L2_ADDR) && defined(CONFIG_SYS_FLASH_BASE) in l2cache_init()
663 l2srbar = CONFIG_SYS_INIT_L2_ADDR; in l2cache_init()
665 printf(", moving to 0x%08x", CONFIG_SYS_INIT_L2_ADDR); in l2cache_init()
/openbmc/u-boot/board/freescale/p1010rdb/
H A Dtlb.c82 #ifdef CONFIG_SYS_INIT_L2_ADDR
84 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
H A Dspl.c69 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; in board_init_r()
/openbmc/u-boot/board/freescale/c29xpcie/
H A Dtlb.c77 #ifdef CONFIG_SYS_INIT_L2_ADDR
78 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
H A Dspl.c53 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; in board_init_r()
/openbmc/u-boot/board/freescale/p1022ds/
H A Dtlb.c93 #ifdef CONFIG_SYS_INIT_L2_ADDR
95 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
H A Dspl.c83 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; in board_init_r()
/openbmc/u-boot/board/gdsys/p1022/
H A Dtlb.c47 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,

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