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Searched refs:CONFIG_SYS_CCSRBAR_PHYS_HIGH (Results 1 – 12 of 12) sorted by relevance

/openbmc/u-boot/include/
H A Dmpc85xx.h39 #undef CONFIG_SYS_CCSRBAR_PHYS_HIGH
41 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 macro
48 #ifndef CONFIG_SYS_CCSRBAR_PHYS_HIGH
50 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0xf macro
52 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 macro
60 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \
/openbmc/u-boot/arch/arm/include/asm/arch-ls102xa/
H A Dimmap_ls102xa.h58 #undef CONFIG_SYS_CCSRBAR_PHYS_HIGH
60 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 macro
67 #ifndef CONFIG_SYS_CCSRBAR_PHYS_HIGH
69 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0xf macro
71 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 macro
79 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \
/openbmc/u-boot/include/configs/
H A Dqemu-ppce500.h37 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32) macro
40 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0 macro
H A DMPC8641HPCN.h90 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH CONFIG_SYS_PHYS_ADDR_HIGH macro
93 CONFIG_SYS_CCSRBAR_PHYS_HIGH)
473 CONFIG_SYS_CCSRBAR_PHYS_HIGH) \
479 CONFIG_SYS_CCSRBAR_PHYS_HIGH) \
H A Dxpedite517x.h74 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0 macro
H A Dsbc8641d.h84 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0 macro
H A DMPC8610HPCD.h71 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0 macro
/openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dimmap_lsch2.h157 #undef CONFIG_SYS_CCSRBAR_PHYS_HIGH
159 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 macro
166 #ifndef CONFIG_SYS_CCSRBAR_PHYS_HIGH
167 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 macro
174 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dstart.S518 #if !defined(CONFIG_SYS_CCSRBAR_PHYS_HIGH) || !defined(CONFIG_SYS_CCSRBAR_PHYS_LOW)
535 CONFIG_SYS_CCSRBAR_PHYS_HIGH, r3
587 lis r0, CONFIG_SYS_CCSRBAR_PHYS_HIGH@h
588 ori r0, r0, CONFIG_SYS_CCSRBAR_PHYS_HIGH@l
626 lis r0, CONFIG_SYS_CCSRBAR_PHYS_HIGH@h
627 ori r0, r0, CONFIG_SYS_CCSRBAR_PHYS_HIGH@l
667 #define CCSRBAR_PHYS_RS12 ((CONFIG_SYS_CCSRBAR_PHYS_HIGH << 20) | \
710 CONFIG_SYS_CCSRBAR_PHYS_HIGH, r3
832 lis r4, CONFIG_SYS_CCSRBAR_PHYS_HIGH@h
833 ori r4, r4, CONFIG_SYS_CCSRBAR_PHYS_HIGH@l
/openbmc/u-boot/arch/powerpc/cpu/mpc86xx/
H A Dstart.S884 li r6, CONFIG_SYS_CCSRBAR_PHYS_HIGH@l
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt2070 CONFIG_SYS_CCSRBAR_PHYS_HIGH
/openbmc/u-boot/
H A DREADME3033 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH
3036 - CONFIG_SYS_CCSRBAR_PHYS_HIGH: