| /openbmc/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7623.c | 48 PLL(CLK_APMIXED_UNIVPLL, 0x220, 0x22c, 0xf3000001, HAVE_RST_BAR,
118 FACTOR0(CLK_TOP_UNIVPLL, CLK_APMIXED_UNIVPLL, 1, 1),
119 FACTOR0(CLK_TOP_UNIVPLL_D2, CLK_APMIXED_UNIVPLL, 1, 2),
120 FACTOR0(CLK_TOP_UNIVPLL_D3, CLK_APMIXED_UNIVPLL, 1, 3),
121 FACTOR0(CLK_TOP_UNIVPLL_D5, CLK_APMIXED_UNIVPLL, 1, 5),
122 FACTOR0(CLK_TOP_UNIVPLL_D7, CLK_APMIXED_UNIVPLL, 1, 7),
123 FACTOR0(CLK_TOP_UNIVPLL_D26, CLK_APMIXED_UNIVPLL, 1, 26),
124 FACTOR0(CLK_TOP_UNIVPLL_D52, CLK_APMIXED_UNIVPLL, 1, 52),
125 FACTOR0(CLK_TOP_UNIVPLL_D108, CLK_APMIXED_UNIVPLL, 1, 108),
126 FACTOR0(CLK_TOP_USB_PHY48M, CLK_APMIXED_UNIVPLL, 1, 26),
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 111 #define CLK_APMIXED_UNIVPLL 4 macro
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| H A D | mt8516-clk.h | 15 #define CLK_APMIXED_UNIVPLL 2 macro
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| H A D | mt6797-clk.h | 109 #define CLK_APMIXED_UNIVPLL 2 macro
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| H A D | mediatek,mt6795-clk.h | 143 #define CLK_APMIXED_UNIVPLL 2 macro
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| H A D | mt8173-clk.h | 159 #define CLK_APMIXED_UNIVPLL 4 macro
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| H A D | mediatek,mt8365-clk.h | 233 #define CLK_APMIXED_UNIVPLL 2 macro
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| H A D | mt2712-clk.h | 13 #define CLK_APMIXED_UNIVPLL 1 macro
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| H A D | mt2701-clk.h | 177 #define CLK_APMIXED_UNIVPLL 3 macro
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| H A D | mt8192-clk.h | 302 #define CLK_APMIXED_UNIVPLL 1 macro
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| H A D | mediatek,mt8188-clk.h | 307 #define CLK_APMIXED_UNIVPLL 7 macro
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| H A D | mt8195-clk.h | 369 #define CLK_APMIXED_UNIVPLL 10 macro
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| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt8135-apmixedsys.c | 41 …PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x238, 0x250, 0xf3000000, HAVE_RST_BAR, 7, 0x238, 6, 0x0, 0x23…
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| H A D | clk-mt8516-apmixedsys.c | 64 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0140, 0x0150, 0x30000000,
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| H A D | clk-mt8167-apmixedsys.c | 63 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0140, 0x0150, 0x30000000,
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| H A D | clk-mt8188-apmixedsys.c | 75 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0504, 0x0510, 0xff000000,
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| H A D | clk-mt2712-apmixedsys.c | 82 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0240, 0x024C, 0xfe000100,
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| H A D | clk-mt8365-apmixedsys.c | 87 PLL(CLK_APMIXED_UNIVPLL, "univpll2", 0x0208, 0x0214, 0xFF000001,
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| H A D | clk-mt8173-apmixedsys.c | 67 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x230, 0x23c, 0xfe000000, HAVE_RST_BAR, 7,
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| H A D | clk-mt8195-apmixedsys.c | 82 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x01f0, 0x0700, 0xff000000,
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| H A D | clk-mt8192-apmixedsys.c | 75 PLL_B(CLK_APMIXED_UNIVPLL, "univpll", 0x0308, 0x0314, 0xff000000,
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| H A D | clk-mt6795-apmixedsys.c | 51 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x230, 0x23c, 0xfe000101, HAVE_RST_BAR,
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| H A D | clk-mt6797.c | 629 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0230, 0x023C, 0xFE000010, 0, 7,
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| H A D | clk-mt2701.c | 944 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x220, 0x22c, 0xf3000000,
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | mt7623-clk.h | 179 #define CLK_APMIXED_UNIVPLL 2 macro
|