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Searched refs:CLK (Results 1 – 25 of 137) sorted by relevance

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/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A Dclock.c72 #define CLK(x) CLOCK_ID_ ## x macro
74 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC),
75 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
77 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(AUDIO),
78 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
80 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
81 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
83 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(NONE),
84 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
86 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A Dclock.c74 #define CLK(x) CLOCK_ID_ ## x macro
76 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC),
77 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
79 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(AUDIO),
80 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
82 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
83 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
85 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(NONE),
86 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
88 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/tegra114/
H A Dclock.c62 #define CLK(x) CLOCK_ID_ ## x macro
64 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC),
65 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
67 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(AUDIO),
68 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
70 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
71 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
73 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(NONE),
74 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
76 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
[all …]
/openbmc/u-boot/arch/arm/mach-keystone/include/mach/
H A Dclock.h34 #define CLK_LIST(CLK)\ argument
35 CLK(0, core_pll_clk)\
36 CLK(1, pass_pll_clk)\
37 CLK(2, tetris_pll_clk)\
38 CLK(3, ddr3a_pll_clk)\
39 CLK(4, ddr3b_pll_clk)\
40 CLK(5, sys_clk0_clk)\
41 CLK(6, sys_clk0_1_clk)\
42 CLK(7, sys_clk0_2_clk)\
43 CLK(8, sys_clk0_3_clk)\
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/tegra30/
H A Dclock.c62 #define CLK(x) CLOCK_ID_ ## x macro
64 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC),
65 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
67 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(AUDIO),
68 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
70 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
71 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
73 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(NONE),
74 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
76 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
[all …]
/openbmc/linux/arch/arm/mach-omap1/
H A Dclock_data.c603 CLK(NULL, "ck_ref", &ck_ref.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX),
604 CLK(NULL, "ck_dpll1", &ck_dpll1.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX),
606 CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk.hw, CK_16XX),
607 CLK(NULL, "ck_sossi", &sossi_ck.hw, CK_16XX),
608 CLK(NULL, "arm_ck", &arm_ck.hw, CK_16XX | CK_1510 | CK_310),
609 CLK(NULL, "armper_ck", &armper_ck.clk.hw, CK_16XX | CK_1510 | CK_310),
610 CLK("omap_gpio.0", "ick", &arm_gpio_ck.hw, CK_1510 | CK_310),
611 CLK(NULL, "armxor_ck", &armxor_ck.clk.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX),
612 CLK(NULL, "armtim_ck", &armtim_ck.clk.hw, CK_16XX | CK_1510 | CK_310),
613 CLK("omap_wdt", "fck", &armwdt_ck.clk.hw, CK_16XX | CK_1510 | CK_310),
[all …]
/openbmc/linux/drivers/gpu/drm/sprd/
H A Dmegacores_pll.c17 #define CLK 0 macro
131 regmap_write(regmap, 0x31, val[CLK]); in dphy_set_timing_reg()
137 regmap_write(regmap, 0x90, val[CLK]); in dphy_set_timing_reg()
144 regmap_write(regmap, 0x32, val[CLK]); in dphy_set_timing_reg()
150 regmap_write(regmap, 0x91, val[CLK]); in dphy_set_timing_reg()
157 regmap_write(regmap, 0x33, val[CLK]); in dphy_set_timing_reg()
163 regmap_write(regmap, 0x92, val[CLK]); in dphy_set_timing_reg()
170 regmap_write(regmap, 0x34, val[CLK]); in dphy_set_timing_reg()
176 regmap_write(regmap, 0x93, val[CLK]); in dphy_set_timing_reg()
183 regmap_write(regmap, 0x36, val[CLK]); in dphy_set_timing_reg()
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/tegra20/
H A Dclock.c59 #define CLK(x) CLOCK_ID_ ## x macro
61 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC) },
62 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(AUDIO) },
63 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC) },
64 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(NONE) },
65 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC) },
66 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC) },
67 { CLK(PERIPH), CLK(CGENERAL), CLK(XCPU), CLK(OSC) },
68 { CLK(PERIPH), CLK(DISPLAY), CLK(CGENERAL), CLK(OSC) },
/openbmc/qemu/tests/qtest/
H A Drtl8139-test.c22 #define CLK 33333333 macro
72 const unsigned from = 0.95 * CLK; in test_timer()
73 const unsigned to = 1.6 * CLK; in test_timer()
88 if (curr > 0.1 * CLK) { in test_timer()
130 out_TimerInt(curr + 0.5 * CLK); in test_timer()
142 out_TimerInt(curr + 0.5 * CLK); in test_timer()
151 next = curr + 5.0 * CLK; in test_timer()
166 next = curr + 5.0 * CLK; in test_timer()
/openbmc/u-boot/drivers/clk/
H A DKconfig3 config CLK config
15 depends on CLK && SPL && SPL_DM
25 depends on CLK && TPL_DM
35 depends on CLK && ARCH_BMIPS
43 depends on CLK
51 depends on CLK && (STM32F7 || STM32F4)
59 depends on CLK && TI_SCI_PROTOCOL && OF_CONTROL
67 depends on CLK
73 depends on CLK && VEXPRESS_CONFIG
80 depends on CLK && ARCH_ZYNQ
[all …]
H A DMakefile7 obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o
8 obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_rate.o
9 obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_factor.o
/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-dbx5x0-pinctrl.dtsi267 pins = "GPIO23_AA4"; /* CLK */
300 pins = "GPIO23_AA4"; /* CLK */
315 pins = "GPIO23_AA4"; /* CLK */
341 pins = "GPIO23_AA4"; /* CLK */
355 pins = "GPIO208_AH16"; /* CLK */
375 pins = "GPIO208_AH16"; /* CLK */
396 pins = "GPIO208_AH16"; /* CLK */
412 pins = "GPIO208_AH16"; /* CLK */
435 pins = "GPIO128_A5"; /* CLK */
459 pins = "GPIO128_A5"; /* CLK */
[all …]
H A Dste-href-family-pinctrl.dtsi29 "GPIO217_AH12"; /* CLK */
49 pins = "GPIO217_AH12"; /* CLK */
66 pins = "GPIO217_AH12"; /* CLK */
/openbmc/u-boot/arch/arm/mach-stm32/
H A DKconfig5 select CLK
21 select CLK
59 select CLK
/openbmc/linux/Documentation/devicetree/bindings/display/ti/
H A Dti,omap5-dss.txt77 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
99 - lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
H A Dti,omap4-dss.txt96 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
118 - lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
H A Dti,dra7-dss.txt73 - lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
H A Dti,omap3-dss.txt86 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
/openbmc/u-boot/board/freescale/bsc9132qds/
H A DREADME94 make BSC9132QDS_NOR_DDRCLK100 : For 100MHZ DDR CLK
95 make BSC9132QDS_NOR_DDRCLK133 : For 133MHZ DDR CLK
98 make BSC9132QDS_SPIFLASH_DDRCLK100 : For 100MHZ DDR CLK
99 make BSC9132QDS_SPIFLASH_DDRCLK133 : For 133MHZ DDR CLK
101 make BSC9132QDS_SDCARD_DDRCLK100 : For 100MHZ DDR CLK
102 make BSC9132QDS_SDCARD_DDRCLK133 : For 133MHZ DDR CLK
/openbmc/linux/drivers/gpu/drm/msm/dsi/
H A Dmmss_cc.xml.h57 CLK = 0, enumerator
66 case CLK: return 0x0000004c; in __offset_CLK()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/
H A Dddc_regs.h158 DDC_REG_LIST(CLK, id)\
168 DDC_VGA_REG_LIST(CLK)\
187 DDC_REG_LIST_DCN2(CLK, id)\
/openbmc/u-boot/include/
H A Dclk.h81 #if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(CLK)
174 CONFIG_IS_ENABLED(CLK)
/openbmc/u-boot/drivers/net/
H A Dmacb.c812 config = MACB_BF(CLK, MACB_CLK_DIV8); in macb_mdc_clk_div()
814 config = MACB_BF(CLK, MACB_CLK_DIV16); in macb_mdc_clk_div()
816 config = MACB_BF(CLK, MACB_CLK_DIV32); in macb_mdc_clk_div()
818 config = MACB_BF(CLK, MACB_CLK_DIV64); in macb_mdc_clk_div()
834 config = GEM_BF(CLK, GEM_CLK_DIV8); in gem_mdc_clk_div()
836 config = GEM_BF(CLK, GEM_CLK_DIV16); in gem_mdc_clk_div()
838 config = GEM_BF(CLK, GEM_CLK_DIV32); in gem_mdc_clk_div()
840 config = GEM_BF(CLK, GEM_CLK_DIV48); in gem_mdc_clk_div()
842 config = GEM_BF(CLK, GEM_CLK_DIV64); in gem_mdc_clk_div()
844 config = GEM_BF(CLK, GEM_CLK_DIV96); in gem_mdc_clk_div()
/openbmc/u-boot/arch/arm/dts/
H A Dmeson-gxl-s905x-khadas-vim.dts151 "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
160 "WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD",
163 "Bluetooth PCM SYNC", "Bluetooth PCM CLK",
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxl-s905x-khadas-vim.dts185 "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
194 "WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD",
197 "Bluetooth PCM SYNC", "Bluetooth PCM CLK",

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