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Searched refs:Bank (Results 1 – 25 of 55) sorted by relevance

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/openbmc/u-boot/board/toradex/colibri_imx6/
H A Dpf0100_otp.inc72 {pmic_i2c, 0xF1, 0x00}, // Reset Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
73 {pmic_i2c, 0xF2, 0x00}, // Reset Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
74 {pmic_i2c, 0xF3, 0x00}, // Reset Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
75 {pmic_i2c, 0xF4, 0x00}, // Reset Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
76 {pmic_i2c, 0xF5, 0x00}, // Reset Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
77 {pmic_i2c, 0xF6, 0x00}, // Reset Bank 6 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
78 {pmic_i2c, 0xF7, 0x00}, // Reset Bank 7 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
79 {pmic_i2c, 0xF8, 0x00}, // Reset Bank 8 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
80 {pmic_i2c, 0xF9, 0x00}, // Reset Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
81 {pmic_i2c, 0xFA, 0x00}, // Reset Bank 10 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
[all …]
/openbmc/u-boot/board/toradex/apalis_imx6/
H A Dpf0100_otp.inc74 {pmic_i2c, 0xF1, 0x00}, // Reset Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
75 {pmic_i2c, 0xF2, 0x00}, // Reset Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
76 {pmic_i2c, 0xF3, 0x00}, // Reset Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
77 {pmic_i2c, 0xF4, 0x00}, // Reset Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
78 {pmic_i2c, 0xF5, 0x00}, // Reset Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
79 {pmic_i2c, 0xF6, 0x00}, // Reset Bank 6 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
80 {pmic_i2c, 0xF7, 0x00}, // Reset Bank 7 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
81 {pmic_i2c, 0xF8, 0x00}, // Reset Bank 8 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
82 {pmic_i2c, 0xF9, 0x00}, // Reset Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
83 {pmic_i2c, 0xFA, 0x00}, // Reset Bank 10 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
[all …]
/openbmc/u-boot/arch/powerpc/cpu/mpc8xx/
H A DKconfig98 bool "Define Bank 1"
109 bool "Define Bank 2"
120 bool "Define Bank 3"
131 bool "Define Bank 4"
142 bool "Define Bank 5"
153 bool "Define Bank 6"
164 bool "Define Bank 7"
/openbmc/u-boot/arch/arm/dts/
H A Dmeson-gxl-s905x-khadas-vim.dts132 gpio-line-names = /* Bank GPIOZ */
137 /* Bank GPIOH */
145 /* Bank BOOT */
150 /* Bank CARD */
153 /* Bank GPIODV */
158 /* Bank GPIOX */
168 /* Bank GPIOCLK */
H A Dmeson-gxl-s905x-libretech-cc.dts183 gpio-line-names = /* Bank GPIOZ */
187 /* Bank GPIOH */
195 /* Bank BOOT */
200 /* Bank CARD */
203 /* Bank GPIODV */
209 /* Bank GPIOX */
220 /* Bank GPIOCLK */
H A Dmeson-gxbb-odroidc2.dts201 gpio-line-names = /* Bank GPIOZ */
207 /* Bank GPIOH */
209 /* Bank BOOT */
214 /* Bank CARD */
217 /* Bank GPIODV */
222 /* Bank GPIOY */
227 /* Bank GPIOX */
237 /* Bank GPIOCLK */
H A Dmeson-gxbb-nanopi-k2.dts205 gpio-line-names = /* Bank GPIOZ */
211 /* Bank GPIOH */
214 /* Bank BOOT */
220 /* Bank CARD */
223 /* Bank GPIODV */
228 /* Bank GPIOY */
238 /* Bank GPIOX */
248 /* Bank GPIOCLK */
H A Dam437x-sk-evm.dts81 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
88 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
95 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
102 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxl-s905x-khadas-vim.dts166 gpio-line-names = /* Bank GPIOZ */
171 /* Bank GPIOH */
179 /* Bank BOOT */
184 /* Bank CARD */
187 /* Bank GPIODV */
192 /* Bank GPIOX */
202 /* Bank GPIOCLK */
H A Dmeson-gxl-s805x-libretech-ac.dts232 gpio-line-names = /* Bank GPIOZ */
236 /* Bank GPIOH */
244 /* Bank BOOT */
250 /* Bank CARD */
252 /* Bank GPIODV */
258 /* Bank GPIOX */
267 /* Bank GPIOCLK */
H A Dmeson-gxbb-odroidc2.dts289 gpio-line-names = /* Bank GPIOZ */
295 /* Bank GPIOH */
297 /* Bank BOOT */
302 /* Bank CARD */
305 /* Bank GPIODV */
310 /* Bank GPIOY */
315 /* Bank GPIOX */
325 /* Bank GPIOCLK */
H A Dmeson-gxl-s905x-libretech-cc.dts255 gpio-line-names = /* Bank GPIOZ */
259 /* Bank GPIOH */
267 /* Bank BOOT */
272 /* Bank CARD */
275 /* Bank GPIODV */
281 /* Bank GPIOX */
292 /* Bank GPIOCLK */
H A Dmeson-gxbb-nanopi-k2.dts246 gpio-line-names = /* Bank GPIOZ */
252 /* Bank GPIOH */
255 /* Bank BOOT */
261 /* Bank CARD */
264 /* Bank GPIODV */
269 /* Bank GPIOY */
279 /* Bank GPIOX */
289 /* Bank GPIOCLK */
/openbmc/libcper/sections/
H A Dcper-section-memory.c36 json_object_new_uint64(memory_error->Bank)); in cper_section_platform_memory_to_ir()
41 json_object_new_uint64(memory_error->Bank & 0xFF)); in cper_section_platform_memory_to_ir()
44 json_object_new_uint64(memory_error->Bank >> 8)); in cper_section_platform_memory_to_ir()
191 json_object_new_uint64(memory_error->Bank)); in cper_section_platform_memory2_to_ir()
196 json_object_new_uint64(memory_error->Bank & 0xFF)); in cper_section_platform_memory2_to_ir()
199 json_object_new_uint64(memory_error->Bank >> 8)); in cper_section_platform_memory2_to_ir()
342 section_cper->Bank = in ir_section_memory_to_cper()
351 section_cper->Bank = address + (group << 8); in ir_section_memory_to_cper()
472 section_cper->Bank = (UINT16)json_object_get_uint64(obj); in ir_section_memory2_to_cper()
480 section_cper->Bank = address + (group << 8); in ir_section_memory2_to_cper()
/openbmc/linux/arch/arm/boot/dts/amlogic/
H A Dmeson8b-odroidc1.dts233 gpio-line-names = /* Bank GPIOX */
243 /* Bank GPIOY */
248 /* Bank GPIODV */
252 /* Bank GPIOH */
257 /* Bank CARD */
261 /* Bank BOOT */
269 /* Bank DIF */
H A Dmeson8b-ec100.dts401 gpio-line-names = /* Bank GPIOX */
408 /* Bank GPIOY */
411 /* Bank GPIODV */
415 /* Bank GPIOH */
420 /* Bank CARD */
424 /* Bank BOOT */
433 /* Bank DIF */
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dbrcm,bcm2835-armctrl-ic.txt34 Bank 0:
44 Bank 1:
78 Bank 2:
/openbmc/linux/Documentation/hwmon/
H A Dabituguru-datasheet.rst166 Bank 0x20 Alarms (R)
169 written) just use 0. Bank 0x20 contains 3 bytes:
184 Bank 0x21 Sensor Bank1 Values / Readings (R)
212 Bank 0x22 Sensor Bank1 Settings (R) and Bank 0x23 Sensor Bank1 Settings (W)
217 address in Bank 0x21 .
264 Bank 0x24 PWM outputs for FAN's (R) and Bank 0x25 PWM outputs for FAN's (W)
291 Bank 0x26 Sensors Bank2 Values / Readings (R)
305 Bank 0x27 Sensors Bank2 Settings (R) and Bank 0x28 Sensors Bank2 Settings (W)
/openbmc/u-boot/drivers/mtd/spi/
H A DKconfig86 bool "SPI flash Bank/Extended address register support"
88 Enable the SPI flash Bank/Extended address register support.
89 Bank/Extended address registers are used to access the flash
/openbmc/u-boot/doc/SPI/
H A Dstatus.txt11 - Bank Address Register (Accessing flashes > 16Mbytes in 3-byte addressing)
/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/
H A D0011-Platform-CS1000-Fix-Bank-offsets.patch4 Subject: [PATCH 9/9] Platform: CS1000: Fix Bank offsets
H A D0012-Platform-CS1000-Increase-BL2-partition-size.patch102 /* Bank configurations */
108 /* Bank : Images flash offsets are with respect to the bank */
/openbmc/u-boot/board/rockchip/evb_rv1108/
H A DREADME28 Bus Width=16 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=512MB
/openbmc/openbmc/meta-amd/meta-ethanolx/recipes-amd/amd-fpga/files/
H A Dfpgardu.sh226 echo ----------FPGAreg$FPGA_REG-----Switch Bank S1:
271 echo ----------FPGAreg$FPGA_REG-----Switch Bank S2:
/openbmc/u-boot/doc/
H A DREADME.N121339 - Bank numbers: 1 or 2.

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