17a837bcfSMugunthan V N/* 27a837bcfSMugunthan V N * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 37a837bcfSMugunthan V N * 47a837bcfSMugunthan V N * This program is free software; you can redistribute it and/or modify 57a837bcfSMugunthan V N * it under the terms of the GNU General Public License version 2 as 67a837bcfSMugunthan V N * published by the Free Software Foundation. 77a837bcfSMugunthan V N */ 87a837bcfSMugunthan V N 97a837bcfSMugunthan V N/* AM437x SK EVM */ 107a837bcfSMugunthan V N 117a837bcfSMugunthan V N/dts-v1/; 127a837bcfSMugunthan V N 137a837bcfSMugunthan V N#include "am4372.dtsi" 147a837bcfSMugunthan V N#include <dt-bindings/pinctrl/am43xx.h> 157a837bcfSMugunthan V N#include <dt-bindings/pwm/pwm.h> 167a837bcfSMugunthan V N#include <dt-bindings/gpio/gpio.h> 177a837bcfSMugunthan V N#include <dt-bindings/input/input.h> 187a837bcfSMugunthan V N 197a837bcfSMugunthan V N/ { 207a837bcfSMugunthan V N model = "TI AM437x SK EVM"; 217a837bcfSMugunthan V N compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43"; 227a837bcfSMugunthan V N 237a837bcfSMugunthan V N aliases { 247a837bcfSMugunthan V N display0 = &lcd0; 257a837bcfSMugunthan V N }; 267a837bcfSMugunthan V N 277a837bcfSMugunthan V N chosen { 287a837bcfSMugunthan V N stdout-path = &uart0; 2934afc614SMugunthan V N tick-timer = &timer2; 307a837bcfSMugunthan V N }; 317a837bcfSMugunthan V N 327a837bcfSMugunthan V N backlight { 337a837bcfSMugunthan V N compatible = "pwm-backlight"; 347a837bcfSMugunthan V N pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; 357a837bcfSMugunthan V N brightness-levels = <0 51 53 56 62 75 101 152 255>; 367a837bcfSMugunthan V N default-brightness-level = <8>; 377a837bcfSMugunthan V N }; 387a837bcfSMugunthan V N 397a837bcfSMugunthan V N sound { 407a837bcfSMugunthan V N compatible = "ti,da830-evm-audio"; 417a837bcfSMugunthan V N ti,model = "AM437x-SK-EVM"; 427a837bcfSMugunthan V N ti,audio-codec = <&tlv320aic3106>; 437a837bcfSMugunthan V N ti,mcasp-controller = <&mcasp1>; 447a837bcfSMugunthan V N ti,codec-clock-rate = <24000000>; 457a837bcfSMugunthan V N ti,audio-routing = 467a837bcfSMugunthan V N "Headphone Jack", "HPLOUT", 477a837bcfSMugunthan V N "Headphone Jack", "HPROUT"; 487a837bcfSMugunthan V N }; 497a837bcfSMugunthan V N 507a837bcfSMugunthan V N matrix_keypad: matrix_keypad@0 { 517a837bcfSMugunthan V N compatible = "gpio-matrix-keypad"; 527a837bcfSMugunthan V N 537a837bcfSMugunthan V N pinctrl-names = "default"; 547a837bcfSMugunthan V N pinctrl-0 = <&matrix_keypad_pins>; 557a837bcfSMugunthan V N 567a837bcfSMugunthan V N debounce-delay-ms = <5>; 577a837bcfSMugunthan V N col-scan-delay-us = <5>; 587a837bcfSMugunthan V N 597a837bcfSMugunthan V N row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */ 607a837bcfSMugunthan V N &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */ 617a837bcfSMugunthan V N 627a837bcfSMugunthan V N col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */ 637a837bcfSMugunthan V N &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */ 647a837bcfSMugunthan V N 657a837bcfSMugunthan V N linux,keymap = < 667a837bcfSMugunthan V N MATRIX_KEY(0, 0, KEY_DOWN) 677a837bcfSMugunthan V N MATRIX_KEY(0, 1, KEY_RIGHT) 687a837bcfSMugunthan V N MATRIX_KEY(1, 0, KEY_LEFT) 697a837bcfSMugunthan V N MATRIX_KEY(1, 1, KEY_UP) 707a837bcfSMugunthan V N >; 717a837bcfSMugunthan V N }; 727a837bcfSMugunthan V N 737a837bcfSMugunthan V N leds { 747a837bcfSMugunthan V N compatible = "gpio-leds"; 757a837bcfSMugunthan V N 767a837bcfSMugunthan V N pinctrl-names = "default"; 777a837bcfSMugunthan V N pinctrl-0 = <&leds_pins>; 787a837bcfSMugunthan V N 797a837bcfSMugunthan V N led@0 { 807a837bcfSMugunthan V N label = "am437x-sk:red:heartbeat"; 817a837bcfSMugunthan V N gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */ 827a837bcfSMugunthan V N linux,default-trigger = "heartbeat"; 837a837bcfSMugunthan V N default-state = "off"; 847a837bcfSMugunthan V N }; 857a837bcfSMugunthan V N 867a837bcfSMugunthan V N led@1 { 877a837bcfSMugunthan V N label = "am437x-sk:green:mmc1"; 887a837bcfSMugunthan V N gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */ 897a837bcfSMugunthan V N linux,default-trigger = "mmc0"; 907a837bcfSMugunthan V N default-state = "off"; 917a837bcfSMugunthan V N }; 927a837bcfSMugunthan V N 937a837bcfSMugunthan V N led@2 { 947a837bcfSMugunthan V N label = "am437x-sk:blue:cpu0"; 957a837bcfSMugunthan V N gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */ 967a837bcfSMugunthan V N linux,default-trigger = "cpu0"; 977a837bcfSMugunthan V N default-state = "off"; 987a837bcfSMugunthan V N }; 997a837bcfSMugunthan V N 1007a837bcfSMugunthan V N led@3 { 1017a837bcfSMugunthan V N label = "am437x-sk:blue:usr3"; 1027a837bcfSMugunthan V N gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */ 1037a837bcfSMugunthan V N default-state = "off"; 1047a837bcfSMugunthan V N }; 1057a837bcfSMugunthan V N }; 1067a837bcfSMugunthan V N 1077a837bcfSMugunthan V N lcd0: display { 1087a837bcfSMugunthan V N compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi"; 1097a837bcfSMugunthan V N label = "lcd"; 1107a837bcfSMugunthan V N 1117a837bcfSMugunthan V N pinctrl-names = "default"; 1127a837bcfSMugunthan V N pinctrl-0 = <&lcd_pins>; 1137a837bcfSMugunthan V N 1147a837bcfSMugunthan V N enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 1157a837bcfSMugunthan V N 1167a837bcfSMugunthan V N panel-timing { 1177a837bcfSMugunthan V N clock-frequency = <9000000>; 1187a837bcfSMugunthan V N hactive = <480>; 1197a837bcfSMugunthan V N vactive = <272>; 1207a837bcfSMugunthan V N hfront-porch = <2>; 1217a837bcfSMugunthan V N hback-porch = <2>; 1227a837bcfSMugunthan V N hsync-len = <41>; 1237a837bcfSMugunthan V N vfront-porch = <2>; 1247a837bcfSMugunthan V N vback-porch = <2>; 1257a837bcfSMugunthan V N vsync-len = <10>; 1267a837bcfSMugunthan V N hsync-active = <0>; 1277a837bcfSMugunthan V N vsync-active = <0>; 1287a837bcfSMugunthan V N de-active = <1>; 1297a837bcfSMugunthan V N pixelclk-active = <1>; 1307a837bcfSMugunthan V N }; 1317a837bcfSMugunthan V N 1327a837bcfSMugunthan V N port { 1337a837bcfSMugunthan V N lcd_in: endpoint { 1347a837bcfSMugunthan V N remote-endpoint = <&dpi_out>; 1357a837bcfSMugunthan V N }; 1367a837bcfSMugunthan V N }; 1377a837bcfSMugunthan V N }; 1387a837bcfSMugunthan V N}; 1397a837bcfSMugunthan V N 1407a837bcfSMugunthan V N&am43xx_pinmux { 1417a837bcfSMugunthan V N matrix_keypad_pins: matrix_keypad_pins { 1427a837bcfSMugunthan V N pinctrl-single,pins = < 1437a837bcfSMugunthan V N 0x24c (PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */ 1447a837bcfSMugunthan V N 0x250 (PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */ 1457a837bcfSMugunthan V N 0x254 (PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */ 1467a837bcfSMugunthan V N 0x258 (PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */ 1477a837bcfSMugunthan V N >; 1487a837bcfSMugunthan V N }; 1497a837bcfSMugunthan V N 1507a837bcfSMugunthan V N leds_pins: leds_pins { 1517a837bcfSMugunthan V N pinctrl-single,pins = < 1527a837bcfSMugunthan V N 0x228 (PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */ 1537a837bcfSMugunthan V N 0x22c (PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */ 1547a837bcfSMugunthan V N 0x230 (PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */ 1557a837bcfSMugunthan V N 0x234 (PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */ 1567a837bcfSMugunthan V N >; 1577a837bcfSMugunthan V N }; 1587a837bcfSMugunthan V N 1597a837bcfSMugunthan V N i2c0_pins: i2c0_pins { 1607a837bcfSMugunthan V N pinctrl-single,pins = < 1617a837bcfSMugunthan V N 0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 1627a837bcfSMugunthan V N 0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 1637a837bcfSMugunthan V N >; 1647a837bcfSMugunthan V N }; 1657a837bcfSMugunthan V N 1667a837bcfSMugunthan V N i2c1_pins: i2c1_pins { 1677a837bcfSMugunthan V N pinctrl-single,pins = < 1687a837bcfSMugunthan V N 0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ 1697a837bcfSMugunthan V N 0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ 1707a837bcfSMugunthan V N >; 1717a837bcfSMugunthan V N }; 1727a837bcfSMugunthan V N 1737a837bcfSMugunthan V N mmc1_pins: pinmux_mmc1_pins { 1747a837bcfSMugunthan V N pinctrl-single,pins = < 1757a837bcfSMugunthan V N 0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ 1767a837bcfSMugunthan V N 0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ 1777a837bcfSMugunthan V N 0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ 1787a837bcfSMugunthan V N 0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ 1797a837bcfSMugunthan V N 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 1807a837bcfSMugunthan V N 0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ 1817a837bcfSMugunthan V N 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ 1827a837bcfSMugunthan V N >; 1837a837bcfSMugunthan V N }; 1847a837bcfSMugunthan V N 1857a837bcfSMugunthan V N ecap0_pins: backlight_pins { 1867a837bcfSMugunthan V N pinctrl-single,pins = < 1877a837bcfSMugunthan V N 0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */ 1887a837bcfSMugunthan V N >; 1897a837bcfSMugunthan V N }; 1907a837bcfSMugunthan V N 1917a837bcfSMugunthan V N edt_ft5306_ts_pins: edt_ft5306_ts_pins { 1927a837bcfSMugunthan V N pinctrl-single,pins = < 1937a837bcfSMugunthan V N 0x74 (PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ 1947a837bcfSMugunthan V N 0x78 (PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */ 1957a837bcfSMugunthan V N >; 1967a837bcfSMugunthan V N }; 1977a837bcfSMugunthan V N 1987a837bcfSMugunthan V N vpfe0_pins_default: vpfe0_pins_default { 1997a837bcfSMugunthan V N pinctrl-single,pins = < 2007a837bcfSMugunthan V N 0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/ 2017a837bcfSMugunthan V N 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/ 2027a837bcfSMugunthan V N 0x1b8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/ 2037a837bcfSMugunthan V N 0x1bc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/ 2047a837bcfSMugunthan V N 0x1c0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/ 2057a837bcfSMugunthan V N 0x1c4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/ 2067a837bcfSMugunthan V N 0x1c8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/ 2077a837bcfSMugunthan V N 0x208 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/ 2087a837bcfSMugunthan V N 0x20c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/ 2097a837bcfSMugunthan V N 0x210 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/ 2107a837bcfSMugunthan V N 0x214 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/ 2117a837bcfSMugunthan V N 0x218 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/ 2127a837bcfSMugunthan V N 0x21c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/ 2137a837bcfSMugunthan V N 0x220 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/ 2147a837bcfSMugunthan V N 0x224 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/ 2157a837bcfSMugunthan V N >; 2167a837bcfSMugunthan V N }; 2177a837bcfSMugunthan V N 2187a837bcfSMugunthan V N vpfe0_pins_sleep: vpfe0_pins_sleep { 2197a837bcfSMugunthan V N pinctrl-single,pins = < 2207a837bcfSMugunthan V N 0x1b0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 2217a837bcfSMugunthan V N 0x1b4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 2227a837bcfSMugunthan V N 0x1b8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 2237a837bcfSMugunthan V N 0x1bc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 2247a837bcfSMugunthan V N 0x1c0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 2257a837bcfSMugunthan V N 0x1c4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 2267a837bcfSMugunthan V N 0x1c8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 2277a837bcfSMugunthan V N 0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 2287a837bcfSMugunthan V N 0x20c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 2297a837bcfSMugunthan V N 0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 2307a837bcfSMugunthan V N 0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 2317a837bcfSMugunthan V N 0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 2327a837bcfSMugunthan V N 0x21c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 2337a837bcfSMugunthan V N 0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 2347a837bcfSMugunthan V N 0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 2357a837bcfSMugunthan V N >; 2367a837bcfSMugunthan V N }; 2377a837bcfSMugunthan V N 2387a837bcfSMugunthan V N cpsw_default: cpsw_default { 2397a837bcfSMugunthan V N pinctrl-single,pins = < 2407a837bcfSMugunthan V N /* Slave 1 */ 2417a837bcfSMugunthan V N 0x12c (PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ 2427a837bcfSMugunthan V N 0x114 (PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 2437a837bcfSMugunthan V N 0x128 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ 2447a837bcfSMugunthan V N 0x124 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ 2457a837bcfSMugunthan V N 0x120 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ 2467a837bcfSMugunthan V N 0x11c (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ 2477a837bcfSMugunthan V N 0x130 (PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ 2487a837bcfSMugunthan V N 0x118 (PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 2497a837bcfSMugunthan V N 0x140 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ 2507a837bcfSMugunthan V N 0x13c (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ 2517a837bcfSMugunthan V N 0x138 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ 2527a837bcfSMugunthan V N 0x134 (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ 2537a837bcfSMugunthan V N 2547a837bcfSMugunthan V N /* Slave 2 */ 2557a837bcfSMugunthan V N 0x58 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ 2567a837bcfSMugunthan V N 0x40 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ 2577a837bcfSMugunthan V N 0x54 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ 2587a837bcfSMugunthan V N 0x50 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ 2597a837bcfSMugunthan V N 0x4c (PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ 2607a837bcfSMugunthan V N 0x48 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ 2617a837bcfSMugunthan V N 0x5c (PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ 2627a837bcfSMugunthan V N 0x44 (PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ 2637a837bcfSMugunthan V N 0x6c (PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ 2647a837bcfSMugunthan V N 0x68 (PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ 2657a837bcfSMugunthan V N 0x64 (PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ 2667a837bcfSMugunthan V N 0x60 (PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ 2677a837bcfSMugunthan V N >; 2687a837bcfSMugunthan V N }; 2697a837bcfSMugunthan V N 2707a837bcfSMugunthan V N cpsw_sleep: cpsw_sleep { 2717a837bcfSMugunthan V N pinctrl-single,pins = < 2727a837bcfSMugunthan V N /* Slave 1 reset value */ 2737a837bcfSMugunthan V N 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) 2747a837bcfSMugunthan V N 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2757a837bcfSMugunthan V N 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2767a837bcfSMugunthan V N 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2777a837bcfSMugunthan V N 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2787a837bcfSMugunthan V N 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) 2797a837bcfSMugunthan V N 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2807a837bcfSMugunthan V N 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2817a837bcfSMugunthan V N 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2827a837bcfSMugunthan V N 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) 2837a837bcfSMugunthan V N 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2847a837bcfSMugunthan V N 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2857a837bcfSMugunthan V N 2867a837bcfSMugunthan V N /* Slave 2 reset value */ 2877a837bcfSMugunthan V N 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2887a837bcfSMugunthan V N 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2897a837bcfSMugunthan V N 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2907a837bcfSMugunthan V N 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2917a837bcfSMugunthan V N 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) 2927a837bcfSMugunthan V N 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2937a837bcfSMugunthan V N 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) 2947a837bcfSMugunthan V N 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2957a837bcfSMugunthan V N 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) 2967a837bcfSMugunthan V N 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2977a837bcfSMugunthan V N 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2987a837bcfSMugunthan V N 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) 2997a837bcfSMugunthan V N >; 3007a837bcfSMugunthan V N }; 3017a837bcfSMugunthan V N 3027a837bcfSMugunthan V N davinci_mdio_default: davinci_mdio_default { 3037a837bcfSMugunthan V N pinctrl-single,pins = < 3047a837bcfSMugunthan V N /* MDIO */ 3057a837bcfSMugunthan V N 0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 3067a837bcfSMugunthan V N 0x14c (PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */ 3077a837bcfSMugunthan V N >; 3087a837bcfSMugunthan V N }; 3097a837bcfSMugunthan V N 3107a837bcfSMugunthan V N davinci_mdio_sleep: davinci_mdio_sleep { 3117a837bcfSMugunthan V N pinctrl-single,pins = < 3127a837bcfSMugunthan V N /* MDIO reset value */ 3137a837bcfSMugunthan V N 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) 3147a837bcfSMugunthan V N 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) 3157a837bcfSMugunthan V N >; 3167a837bcfSMugunthan V N }; 3177a837bcfSMugunthan V N 3187a837bcfSMugunthan V N dss_pins: dss_pins { 3197a837bcfSMugunthan V N pinctrl-single,pins = < 3207a837bcfSMugunthan V N 0x020 (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */ 3217a837bcfSMugunthan V N 0x024 (PIN_OUTPUT | MUX_MODE1) 3227a837bcfSMugunthan V N 0x028 (PIN_OUTPUT | MUX_MODE1) 3237a837bcfSMugunthan V N 0x02c (PIN_OUTPUT | MUX_MODE1) 3247a837bcfSMugunthan V N 0x030 (PIN_OUTPUT | MUX_MODE1) 3257a837bcfSMugunthan V N 0x034 (PIN_OUTPUT | MUX_MODE1) 3267a837bcfSMugunthan V N 0x038 (PIN_OUTPUT | MUX_MODE1) 3277a837bcfSMugunthan V N 0x03c (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */ 3287a837bcfSMugunthan V N 0x0a0 (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */ 3297a837bcfSMugunthan V N 0x0a4 (PIN_OUTPUT | MUX_MODE0) 3307a837bcfSMugunthan V N 0x0a8 (PIN_OUTPUT | MUX_MODE0) 3317a837bcfSMugunthan V N 0x0ac (PIN_OUTPUT | MUX_MODE0) 3327a837bcfSMugunthan V N 0x0b0 (PIN_OUTPUT | MUX_MODE0) 3337a837bcfSMugunthan V N 0x0b4 (PIN_OUTPUT | MUX_MODE0) 3347a837bcfSMugunthan V N 0x0b8 (PIN_OUTPUT | MUX_MODE0) 3357a837bcfSMugunthan V N 0x0bc (PIN_OUTPUT | MUX_MODE0) 3367a837bcfSMugunthan V N 0x0c0 (PIN_OUTPUT | MUX_MODE0) 3377a837bcfSMugunthan V N 0x0c4 (PIN_OUTPUT | MUX_MODE0) 3387a837bcfSMugunthan V N 0x0c8 (PIN_OUTPUT | MUX_MODE0) 3397a837bcfSMugunthan V N 0x0cc (PIN_OUTPUT | MUX_MODE0) 3407a837bcfSMugunthan V N 0x0d0 (PIN_OUTPUT | MUX_MODE0) 3417a837bcfSMugunthan V N 0x0d4 (PIN_OUTPUT | MUX_MODE0) 3427a837bcfSMugunthan V N 0x0d8 (PIN_OUTPUT | MUX_MODE0) 3437a837bcfSMugunthan V N 0x0dc (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */ 3447a837bcfSMugunthan V N 0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */ 3457a837bcfSMugunthan V N 0x0e4 (PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */ 3467a837bcfSMugunthan V N 0x0e8 (PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */ 3477a837bcfSMugunthan V N 0x0ec (PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */ 3487a837bcfSMugunthan V N 3497a837bcfSMugunthan V N >; 3507a837bcfSMugunthan V N }; 3517a837bcfSMugunthan V N 3527a837bcfSMugunthan V N qspi_pins: qspi_pins { 3537a837bcfSMugunthan V N pinctrl-single,pins = < 3547a837bcfSMugunthan V N 0x7c (PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */ 3557a837bcfSMugunthan V N 0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ 3567a837bcfSMugunthan V N 0x90 (PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ 3577a837bcfSMugunthan V N 0x94 (PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ 3587a837bcfSMugunthan V N 0x98 (PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */ 3597a837bcfSMugunthan V N 0x9c (PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ 3607a837bcfSMugunthan V N >; 3617a837bcfSMugunthan V N }; 3627a837bcfSMugunthan V N 3637a837bcfSMugunthan V N mcasp1_pins: mcasp1_pins { 3647a837bcfSMugunthan V N pinctrl-single,pins = < 3657a837bcfSMugunthan V N 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ 3667a837bcfSMugunthan V N 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ 3677a837bcfSMugunthan V N 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ 3687a837bcfSMugunthan V N 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ 3697a837bcfSMugunthan V N >; 3707a837bcfSMugunthan V N }; 3717a837bcfSMugunthan V N 3727a837bcfSMugunthan V N lcd_pins: lcd_pins { 3737a837bcfSMugunthan V N pinctrl-single,pins = < 3747a837bcfSMugunthan V N 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */ 3757a837bcfSMugunthan V N >; 3767a837bcfSMugunthan V N }; 3777a837bcfSMugunthan V N 3787a837bcfSMugunthan V N usb1_pins: usb1_pins { 3797a837bcfSMugunthan V N pinctrl-single,pins = < 3807a837bcfSMugunthan V N 0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ 3817a837bcfSMugunthan V N >; 3827a837bcfSMugunthan V N }; 3837a837bcfSMugunthan V N 3847a837bcfSMugunthan V N usb2_pins: usb2_pins { 3857a837bcfSMugunthan V N pinctrl-single,pins = < 3867a837bcfSMugunthan V N 0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ 3877a837bcfSMugunthan V N >; 3887a837bcfSMugunthan V N }; 3897a837bcfSMugunthan V N}; 3907a837bcfSMugunthan V N 3917a837bcfSMugunthan V N&i2c0 { 3927a837bcfSMugunthan V N status = "okay"; 3937a837bcfSMugunthan V N pinctrl-names = "default"; 3947a837bcfSMugunthan V N pinctrl-0 = <&i2c0_pins>; 3957a837bcfSMugunthan V N clock-frequency = <400000>; 3967a837bcfSMugunthan V N 3977a837bcfSMugunthan V N tps@24 { 3987a837bcfSMugunthan V N compatible = "ti,tps65218"; 3997a837bcfSMugunthan V N reg = <0x24>; 4007a837bcfSMugunthan V N interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 4017a837bcfSMugunthan V N interrupt-controller; 4027a837bcfSMugunthan V N #interrupt-cells = <2>; 4037a837bcfSMugunthan V N 4047a837bcfSMugunthan V N dcdc1: regulator-dcdc1 { 4057a837bcfSMugunthan V N compatible = "ti,tps65218-dcdc1"; 4067a837bcfSMugunthan V N /* VDD_CORE limits min of OPP50 and max of OPP100 */ 4077a837bcfSMugunthan V N regulator-name = "vdd_core"; 4087a837bcfSMugunthan V N regulator-min-microvolt = <912000>; 4097a837bcfSMugunthan V N regulator-max-microvolt = <1144000>; 4107a837bcfSMugunthan V N regulator-boot-on; 4117a837bcfSMugunthan V N regulator-always-on; 4127a837bcfSMugunthan V N }; 4137a837bcfSMugunthan V N 4147a837bcfSMugunthan V N dcdc2: regulator-dcdc2 { 4157a837bcfSMugunthan V N compatible = "ti,tps65218-dcdc2"; 4167a837bcfSMugunthan V N /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */ 4177a837bcfSMugunthan V N regulator-name = "vdd_mpu"; 4187a837bcfSMugunthan V N regulator-min-microvolt = <912000>; 4197a837bcfSMugunthan V N regulator-max-microvolt = <1378000>; 4207a837bcfSMugunthan V N regulator-boot-on; 4217a837bcfSMugunthan V N regulator-always-on; 4227a837bcfSMugunthan V N }; 4237a837bcfSMugunthan V N 4247a837bcfSMugunthan V N dcdc3: regulator-dcdc3 { 4257a837bcfSMugunthan V N compatible = "ti,tps65218-dcdc3"; 4267a837bcfSMugunthan V N regulator-name = "vdds_ddr"; 4277a837bcfSMugunthan V N regulator-min-microvolt = <1500000>; 4287a837bcfSMugunthan V N regulator-max-microvolt = <1500000>; 4297a837bcfSMugunthan V N regulator-boot-on; 4307a837bcfSMugunthan V N regulator-always-on; 4317a837bcfSMugunthan V N }; 4327a837bcfSMugunthan V N 4337a837bcfSMugunthan V N dcdc4: regulator-dcdc4 { 4347a837bcfSMugunthan V N compatible = "ti,tps65218-dcdc4"; 4357a837bcfSMugunthan V N regulator-name = "v3_3d"; 4367a837bcfSMugunthan V N regulator-min-microvolt = <3300000>; 4377a837bcfSMugunthan V N regulator-max-microvolt = <3300000>; 4387a837bcfSMugunthan V N regulator-boot-on; 4397a837bcfSMugunthan V N regulator-always-on; 4407a837bcfSMugunthan V N }; 4417a837bcfSMugunthan V N 4427a837bcfSMugunthan V N ldo1: regulator-ldo1 { 4437a837bcfSMugunthan V N compatible = "ti,tps65218-ldo1"; 4447a837bcfSMugunthan V N regulator-name = "v1_8d"; 4457a837bcfSMugunthan V N regulator-min-microvolt = <1800000>; 4467a837bcfSMugunthan V N regulator-max-microvolt = <1800000>; 4477a837bcfSMugunthan V N regulator-boot-on; 4487a837bcfSMugunthan V N regulator-always-on; 4497a837bcfSMugunthan V N }; 4507a837bcfSMugunthan V N 4517a837bcfSMugunthan V N power-button { 4527a837bcfSMugunthan V N compatible = "ti,tps65218-pwrbutton"; 4537a837bcfSMugunthan V N status = "okay"; 4547a837bcfSMugunthan V N interrupts = <3 IRQ_TYPE_EDGE_BOTH>; 4557a837bcfSMugunthan V N }; 4567a837bcfSMugunthan V N }; 4577a837bcfSMugunthan V N 4587a837bcfSMugunthan V N at24@50 { 4597a837bcfSMugunthan V N compatible = "at24,24c256"; 4607a837bcfSMugunthan V N pagesize = <64>; 4617a837bcfSMugunthan V N reg = <0x50>; 4627a837bcfSMugunthan V N }; 4637a837bcfSMugunthan V N}; 4647a837bcfSMugunthan V N 4657a837bcfSMugunthan V N&i2c1 { 4667a837bcfSMugunthan V N status = "okay"; 4677a837bcfSMugunthan V N pinctrl-names = "default"; 4687a837bcfSMugunthan V N pinctrl-0 = <&i2c1_pins>; 4697a837bcfSMugunthan V N clock-frequency = <400000>; 4707a837bcfSMugunthan V N 4717a837bcfSMugunthan V N edt-ft5306@38 { 4727a837bcfSMugunthan V N status = "okay"; 4737a837bcfSMugunthan V N compatible = "edt,edt-ft5306", "edt,edt-ft5x06"; 4747a837bcfSMugunthan V N pinctrl-names = "default"; 4757a837bcfSMugunthan V N pinctrl-0 = <&edt_ft5306_ts_pins>; 4767a837bcfSMugunthan V N 4777a837bcfSMugunthan V N reg = <0x38>; 4787a837bcfSMugunthan V N interrupt-parent = <&gpio0>; 4797a837bcfSMugunthan V N interrupts = <31 0>; 4807a837bcfSMugunthan V N 4817a837bcfSMugunthan V N reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; 4827a837bcfSMugunthan V N 4837a837bcfSMugunthan V N touchscreen-size-x = <480>; 4847a837bcfSMugunthan V N touchscreen-size-y = <272>; 4857a837bcfSMugunthan V N }; 4867a837bcfSMugunthan V N 4877a837bcfSMugunthan V N tlv320aic3106: tlv320aic3106@1b { 4887a837bcfSMugunthan V N compatible = "ti,tlv320aic3106"; 4897a837bcfSMugunthan V N reg = <0x1b>; 4907a837bcfSMugunthan V N status = "okay"; 4917a837bcfSMugunthan V N 4927a837bcfSMugunthan V N /* Regulators */ 4937a837bcfSMugunthan V N AVDD-supply = <&dcdc4>; 4947a837bcfSMugunthan V N IOVDD-supply = <&dcdc4>; 4957a837bcfSMugunthan V N DRVDD-supply = <&dcdc4>; 4967a837bcfSMugunthan V N DVDD-supply = <&ldo1>; 4977a837bcfSMugunthan V N }; 4987a837bcfSMugunthan V N 4997a837bcfSMugunthan V N lis331dlh@18 { 5007a837bcfSMugunthan V N compatible = "st,lis331dlh"; 5017a837bcfSMugunthan V N reg = <0x18>; 5027a837bcfSMugunthan V N status = "okay"; 5037a837bcfSMugunthan V N 5047a837bcfSMugunthan V N Vdd-supply = <&dcdc4>; 5057a837bcfSMugunthan V N Vdd_IO-supply = <&dcdc4>; 5067a837bcfSMugunthan V N interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>; 5077a837bcfSMugunthan V N }; 5087a837bcfSMugunthan V N}; 5097a837bcfSMugunthan V N 5107a837bcfSMugunthan V N&epwmss0 { 5117a837bcfSMugunthan V N status = "okay"; 5127a837bcfSMugunthan V N}; 5137a837bcfSMugunthan V N 5147a837bcfSMugunthan V N&ecap0 { 5157a837bcfSMugunthan V N status = "okay"; 5167a837bcfSMugunthan V N pinctrl-names = "default"; 5177a837bcfSMugunthan V N pinctrl-0 = <&ecap0_pins>; 5187a837bcfSMugunthan V N}; 5197a837bcfSMugunthan V N 5207a837bcfSMugunthan V N&gpio0 { 5217a837bcfSMugunthan V N status = "okay"; 5227a837bcfSMugunthan V N}; 5237a837bcfSMugunthan V N 5247a837bcfSMugunthan V N&gpio1 { 5257a837bcfSMugunthan V N status = "okay"; 5267a837bcfSMugunthan V N}; 5277a837bcfSMugunthan V N 5287a837bcfSMugunthan V N&gpio5 { 5297a837bcfSMugunthan V N status = "okay"; 5307a837bcfSMugunthan V N}; 5317a837bcfSMugunthan V N 5327a837bcfSMugunthan V N&mmc1 { 5337a837bcfSMugunthan V N status = "okay"; 5347a837bcfSMugunthan V N pinctrl-names = "default"; 5357a837bcfSMugunthan V N pinctrl-0 = <&mmc1_pins>; 5367a837bcfSMugunthan V N 5377a837bcfSMugunthan V N vmmc-supply = <&dcdc4>; 5387a837bcfSMugunthan V N bus-width = <4>; 539*103afa2aSMugunthan V N cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 5407a837bcfSMugunthan V N}; 5417a837bcfSMugunthan V N 5427a837bcfSMugunthan V N&usb2_phy1 { 5437a837bcfSMugunthan V N status = "okay"; 5447a837bcfSMugunthan V N}; 5457a837bcfSMugunthan V N 5467a837bcfSMugunthan V N&usb1 { 5477a837bcfSMugunthan V N dr_mode = "peripheral"; 5487a837bcfSMugunthan V N status = "okay"; 5497a837bcfSMugunthan V N pinctrl-names = "default"; 5507a837bcfSMugunthan V N pinctrl-0 = <&usb1_pins>; 5517a837bcfSMugunthan V N}; 5527a837bcfSMugunthan V N 5537a837bcfSMugunthan V N&usb2_phy2 { 5547a837bcfSMugunthan V N status = "okay"; 5557a837bcfSMugunthan V N}; 5567a837bcfSMugunthan V N 5577a837bcfSMugunthan V N&usb2 { 5587a837bcfSMugunthan V N dr_mode = "host"; 5597a837bcfSMugunthan V N status = "okay"; 5607a837bcfSMugunthan V N pinctrl-names = "default"; 5617a837bcfSMugunthan V N pinctrl-0 = <&usb2_pins>; 5627a837bcfSMugunthan V N}; 5637a837bcfSMugunthan V N 5647a837bcfSMugunthan V N&qspi { 5657a837bcfSMugunthan V N status = "okay"; 5667a837bcfSMugunthan V N pinctrl-names = "default"; 5677a837bcfSMugunthan V N pinctrl-0 = <&qspi_pins>; 5687a837bcfSMugunthan V N 5697a837bcfSMugunthan V N spi-max-frequency = <48000000>; 5707a837bcfSMugunthan V N m25p80@0 { 5714416ddbaSMugunthan V N compatible = "mx66l51235l","spi-flash"; 5727a837bcfSMugunthan V N spi-max-frequency = <48000000>; 5737a837bcfSMugunthan V N reg = <0>; 5747a837bcfSMugunthan V N spi-cpol; 5757a837bcfSMugunthan V N spi-cpha; 5767a837bcfSMugunthan V N spi-tx-bus-width = <1>; 5777a837bcfSMugunthan V N spi-rx-bus-width = <4>; 5787a837bcfSMugunthan V N #address-cells = <1>; 5797a837bcfSMugunthan V N #size-cells = <1>; 5807a837bcfSMugunthan V N 5817a837bcfSMugunthan V N /* MTD partition table. 5827a837bcfSMugunthan V N * The ROM checks the first 512KiB 5837a837bcfSMugunthan V N * for a valid file to boot(XIP). 5847a837bcfSMugunthan V N */ 5857a837bcfSMugunthan V N partition@0 { 5867a837bcfSMugunthan V N label = "QSPI.U_BOOT"; 5877a837bcfSMugunthan V N reg = <0x00000000 0x000080000>; 5887a837bcfSMugunthan V N }; 5897a837bcfSMugunthan V N partition@1 { 5907a837bcfSMugunthan V N label = "QSPI.U_BOOT.backup"; 5917a837bcfSMugunthan V N reg = <0x00080000 0x00080000>; 5927a837bcfSMugunthan V N }; 5937a837bcfSMugunthan V N partition@2 { 5947a837bcfSMugunthan V N label = "QSPI.U-BOOT-SPL_OS"; 5957a837bcfSMugunthan V N reg = <0x00100000 0x00010000>; 5967a837bcfSMugunthan V N }; 5977a837bcfSMugunthan V N partition@3 { 5987a837bcfSMugunthan V N label = "QSPI.U_BOOT_ENV"; 5997a837bcfSMugunthan V N reg = <0x00110000 0x00010000>; 6007a837bcfSMugunthan V N }; 6017a837bcfSMugunthan V N partition@4 { 6027a837bcfSMugunthan V N label = "QSPI.U-BOOT-ENV.backup"; 6037a837bcfSMugunthan V N reg = <0x00120000 0x00010000>; 6047a837bcfSMugunthan V N }; 6057a837bcfSMugunthan V N partition@5 { 6067a837bcfSMugunthan V N label = "QSPI.KERNEL"; 6077a837bcfSMugunthan V N reg = <0x00130000 0x0800000>; 6087a837bcfSMugunthan V N }; 6097a837bcfSMugunthan V N partition@6 { 6107a837bcfSMugunthan V N label = "QSPI.FILESYSTEM"; 6117a837bcfSMugunthan V N reg = <0x00930000 0x36D0000>; 6127a837bcfSMugunthan V N }; 6137a837bcfSMugunthan V N }; 6147a837bcfSMugunthan V N}; 6157a837bcfSMugunthan V N 6167a837bcfSMugunthan V N&mac { 6177a837bcfSMugunthan V N pinctrl-names = "default", "sleep"; 6187a837bcfSMugunthan V N pinctrl-0 = <&cpsw_default>; 6197a837bcfSMugunthan V N pinctrl-1 = <&cpsw_sleep>; 6207a837bcfSMugunthan V N dual_emac = <1>; 6217a837bcfSMugunthan V N status = "okay"; 6227a837bcfSMugunthan V N}; 6237a837bcfSMugunthan V N 6247a837bcfSMugunthan V N&davinci_mdio { 6257a837bcfSMugunthan V N pinctrl-names = "default", "sleep"; 6267a837bcfSMugunthan V N pinctrl-0 = <&davinci_mdio_default>; 6277a837bcfSMugunthan V N pinctrl-1 = <&davinci_mdio_sleep>; 6287a837bcfSMugunthan V N status = "okay"; 6297a837bcfSMugunthan V N}; 6307a837bcfSMugunthan V N 6317a837bcfSMugunthan V N&cpsw_emac0 { 6327a837bcfSMugunthan V N phy_id = <&davinci_mdio>, <4>; 6337a837bcfSMugunthan V N phy-mode = "rgmii"; 6347a837bcfSMugunthan V N dual_emac_res_vlan = <1>; 6357a837bcfSMugunthan V N}; 6367a837bcfSMugunthan V N 6377a837bcfSMugunthan V N&cpsw_emac1 { 6387a837bcfSMugunthan V N phy_id = <&davinci_mdio>, <5>; 6397a837bcfSMugunthan V N phy-mode = "rgmii"; 6407a837bcfSMugunthan V N dual_emac_res_vlan = <2>; 6417a837bcfSMugunthan V N}; 6427a837bcfSMugunthan V N 6437a837bcfSMugunthan V N&elm { 6447a837bcfSMugunthan V N status = "okay"; 6457a837bcfSMugunthan V N}; 6467a837bcfSMugunthan V N 6477a837bcfSMugunthan V N&mcasp1 { 6487a837bcfSMugunthan V N pinctrl-names = "default"; 6497a837bcfSMugunthan V N pinctrl-0 = <&mcasp1_pins>; 6507a837bcfSMugunthan V N 6517a837bcfSMugunthan V N status = "okay"; 6527a837bcfSMugunthan V N 6537a837bcfSMugunthan V N op-mode = <0>; 6547a837bcfSMugunthan V N tdm-slots = <2>; 6557a837bcfSMugunthan V N serial-dir = < 6567a837bcfSMugunthan V N 0 0 1 2 6577a837bcfSMugunthan V N >; 6587a837bcfSMugunthan V N 6597a837bcfSMugunthan V N tx-num-evt = <1>; 6607a837bcfSMugunthan V N rx-num-evt = <1>; 6617a837bcfSMugunthan V N}; 6627a837bcfSMugunthan V N 6637a837bcfSMugunthan V N&dss { 6647a837bcfSMugunthan V N status = "okay"; 6657a837bcfSMugunthan V N 6667a837bcfSMugunthan V N pinctrl-names = "default"; 6677a837bcfSMugunthan V N pinctrl-0 = <&dss_pins>; 6687a837bcfSMugunthan V N 6697a837bcfSMugunthan V N port { 6707a837bcfSMugunthan V N dpi_out: endpoint@0 { 6717a837bcfSMugunthan V N remote-endpoint = <&lcd_in>; 6727a837bcfSMugunthan V N data-lines = <24>; 6737a837bcfSMugunthan V N }; 6747a837bcfSMugunthan V N }; 6757a837bcfSMugunthan V N}; 6767a837bcfSMugunthan V N 6777a837bcfSMugunthan V N&rtc { 6787a837bcfSMugunthan V N status = "okay"; 6797a837bcfSMugunthan V N}; 6807a837bcfSMugunthan V N 6817a837bcfSMugunthan V N&wdt { 6827a837bcfSMugunthan V N status = "okay"; 6837a837bcfSMugunthan V N}; 6847a837bcfSMugunthan V N 6857a837bcfSMugunthan V N&cpu { 6867a837bcfSMugunthan V N cpu0-supply = <&dcdc2>; 6877a837bcfSMugunthan V N}; 6887a837bcfSMugunthan V N 6897a837bcfSMugunthan V N&vpfe0 { 6907a837bcfSMugunthan V N status = "okay"; 6917a837bcfSMugunthan V N pinctrl-names = "default", "sleep"; 6927a837bcfSMugunthan V N pinctrl-0 = <&vpfe0_pins_default>; 6937a837bcfSMugunthan V N pinctrl-1 = <&vpfe0_pins_sleep>; 6947a837bcfSMugunthan V N 6957a837bcfSMugunthan V N /* Camera port */ 6967a837bcfSMugunthan V N port { 6977a837bcfSMugunthan V N vpfe0_ep: endpoint { 6987a837bcfSMugunthan V N /* remote-endpoint = <&sensor>; add once we have it */ 6997a837bcfSMugunthan V N ti,am437x-vpfe-interface = <0>; 7007a837bcfSMugunthan V N bus-width = <8>; 7017a837bcfSMugunthan V N hsync-active = <0>; 7027a837bcfSMugunthan V N vsync-active = <0>; 7037a837bcfSMugunthan V N }; 7047a837bcfSMugunthan V N }; 7057a837bcfSMugunthan V N}; 706