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Searched refs:ARMv7MState (Results 1 – 11 of 11) sorted by relevance

/openbmc/qemu/hw/arm/
H A Darmv7m.c184 ARMv7MState *s = opaque; in v7m_systick_write()
197 ARMv7MState *s = opaque; in v7m_systick_read()
251 ARMv7MState *s = ARMV7M(obj); in armv7m_instance_init()
282 ARMv7MState *s = ARMV7M(dev); in armv7m_realize()
542 DEFINE_PROP_STRING("cpu-type", ARMv7MState, cpu_type),
543 DEFINE_PROP_LINK("memory", ARMv7MState, board_memory, TYPE_MEMORY_REGION,
545 DEFINE_PROP_LINK("idau", ARMv7MState, idau, TYPE_IDAU_INTERFACE, Object *),
546 DEFINE_PROP_UINT32("init-svtor", ARMv7MState, init_svtor, 0),
547 DEFINE_PROP_UINT32("init-nsvtor", ARMv7MState, init_nsvtor, 0),
548 DEFINE_PROP_BOOL("enable-bitband", ARMv7MState, enable_bitband, false),
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H A Dmps2.c73 ARMv7MState armv7m;
/openbmc/qemu/include/hw/arm/
H A Darmv7m.h35 OBJECT_DECLARE_SIMPLE_TYPE(ARMv7MState, ARMV7M)
65 struct ARMv7MState { struct
H A Dstm32f100_soc.h48 ARMv7MState armv7m;
H A Dmsf2-soc.h52 ARMv7MState armv7m;
H A Dnrf51_soc.h33 ARMv7MState cpu;
H A Dstm32f205_soc.h54 ARMv7MState armv7m;
H A Dstm32l4x5_soc.h51 ARMv7MState armv7m;
H A Dstm32f405_soc.h57 ARMv7MState armv7m;
H A Darmsse.h155 ARMv7MState armv7m[SSE_MAX_CPUS];
H A Daspeed_soc.h152 ARMv7MState armv7m;