/openbmc/qemu/target/arm/ |
H A D | helper.c | 39 static uint64_t raw_read(CPUARMState *env, const ARMCPRegInfo *ri) in raw_read() 49 void raw_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) in raw_write() 59 static void *raw_ptr(CPUARMState *env, const ARMCPRegInfo *ri) in raw_ptr() 64 uint64_t read_raw_cp_reg(CPUARMState *env, const ARMCPRegInfo *ri) in read_raw_cp_reg() 78 static void write_raw_cp_reg(CPUARMState *env, const ARMCPRegInfo *ri, in write_raw_cp_reg() 98 static bool raw_accessors_invalid(const ARMCPRegInfo *ri) in raw_accessors_invalid() 128 const ARMCPRegInfo *ri; in write_cpustate_to_list() 174 const ARMCPRegInfo *ri; in write_list_to_cpustate() 201 const ARMCPRegInfo *ri = get_arm_cp_reginfo(cpu->cp_regs, regidx); in add_cpreg_to_list() 213 const ARMCPRegInfo *ri; in count_cpreg() [all …]
|
H A D | cpregs.h | 814 typedef struct ARMCPRegInfo ARMCPRegInfo; typedef 820 typedef uint64_t CPReadFn(CPUARMState *env, const ARMCPRegInfo *opaque); 821 typedef void CPWriteFn(CPUARMState *env, const ARMCPRegInfo *opaque, 825 const ARMCPRegInfo *opaque, 828 typedef void CPResetFn(CPUARMState *env, const ARMCPRegInfo *opaque); 838 struct ARMCPRegInfo { struct 983 void define_one_arm_cp_reg_with_opaque(ARMCPU *cpu, const ARMCPRegInfo *reg, 986 static inline void define_one_arm_cp_reg(ARMCPU *cpu, const ARMCPRegInfo *regs) in define_one_arm_cp_reg() 991 void define_arm_cp_regs_with_opaque_len(ARMCPU *cpu, const ARMCPRegInfo *regs, 1004 const ARMCPRegInfo *get_arm_cp_reginfo(GHashTable *cpregs, uint32_t encoded_cp); [all …]
|
H A D | debug_helper.c | 788 static CPAccessResult access_tdosa(CPUARMState *env, const ARMCPRegInfo *ri, in access_tdosa() 809 static CPAccessResult access_tdra(CPUARMState *env, const ARMCPRegInfo *ri, in access_tdra() 830 static CPAccessResult access_tda(CPUARMState *env, const ARMCPRegInfo *ri, in access_tda() 847 static CPAccessResult access_dbgvcr32(CPUARMState *env, const ARMCPRegInfo *ri, in access_dbgvcr32() 864 static CPAccessResult access_tdcc(CPUARMState *env, const ARMCPRegInfo *ri, in access_tdcc() 889 static void oslar_write(CPUARMState *env, const ARMCPRegInfo *ri, in oslar_write() 907 static void osdlr_write(CPUARMState *env, const ARMCPRegInfo *ri, in osdlr_write() 922 static void dbgclaimset_write(CPUARMState *env, const ARMCPRegInfo *ri, in dbgclaimset_write() 928 static uint64_t dbgclaimset_read(CPUARMState *env, const ARMCPRegInfo *ri) in dbgclaimset_read() 934 static void dbgclaimclr_write(CPUARMState *env, const ARMCPRegInfo *ri, in dbgclaimclr_write() [all …]
|
H A D | cortex-regs.c | 14 static uint64_t l2ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri) in l2ctlr_read() 29 static const ARMCPRegInfo cortex_a72_a57_a53_cp_reginfo[] = {
|
H A D | gdbstub.c | 232 const ARMCPRegInfo *ri; in arm_gdb_get_sysreg() 254 ARMCPRegInfo *ri, uint32_t ri_key, in arm_gen_one_feature_sysreg() 267 ARMCPRegInfo *ri = value; in arm_register_sysreg_for_feature()
|
H A D | cpu.c | 186 ARMCPRegInfo *ri = value; in cp_reg_reset() 221 ARMCPRegInfo *ri = value; in cp_reg_check_reset()
|
/openbmc/qemu/hw/intc/ |
H A D | arm_gicv3_cpuif.c | 559 static uint64_t icv_ap_read(CPUARMState *env, const ARMCPRegInfo *ri) in icv_ap_read() 570 static void icv_ap_write(CPUARMState *env, const ARMCPRegInfo *ri, in icv_ap_write() 589 static uint64_t icv_bpr_read(CPUARMState *env, const ARMCPRegInfo *ri) in icv_bpr_read() 614 static void icv_bpr_write(CPUARMState *env, const ARMCPRegInfo *ri, in icv_bpr_write() 633 static uint64_t icv_pmr_read(CPUARMState *env, const ARMCPRegInfo *ri) in icv_pmr_read() 645 static void icv_pmr_write(CPUARMState *env, const ARMCPRegInfo *ri, in icv_pmr_write() 660 static uint64_t icv_igrpen_read(CPUARMState *env, const ARMCPRegInfo *ri) in icv_igrpen_read() 674 static void icv_igrpen_write(CPUARMState *env, const ARMCPRegInfo *ri, in icv_igrpen_write() 689 static uint64_t icv_ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri) in icv_ctlr_read() 712 static void icv_ctlr_write(CPUARMState *env, const ARMCPRegInfo *ri, in icv_ctlr_write() [all …]
|
H A D | arm_gicv3_kvm.c | 667 static void arm_gicv3_icc_reset(CPUARMState *env, const ARMCPRegInfo *ri) in arm_gicv3_icc_reset() 732 static const ARMCPRegInfo gicv3_cpuif_reginfo[] = {
|
/openbmc/qemu/target/arm/tcg/ |
H A D | op_helper.c | 758 const ARMCPRegInfo *ri = get_arm_cp_reginfo(cpu->cp_regs, key); in HELPER() 888 const ARMCPRegInfo *ri = get_arm_cp_reginfo(cpu->cp_regs, key); in HELPER() 941 const ARMCPRegInfo *ri = rip; in HELPER() 954 const ARMCPRegInfo *ri = rip; in HELPER() 970 const ARMCPRegInfo *ri = rip; in HELPER() 983 const ARMCPRegInfo *ri = rip; in HELPER()
|
H A D | cpu32.c | 196 ARMCPRegInfo ifar = { in arm1026_initfn() 336 static const ARMCPRegInfo cortexa8_cp_reginfo[] = { 383 static const ARMCPRegInfo cortexa9_cp_reginfo[] = { 457 static uint64_t a15_l2ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri) in a15_l2ctlr_read() 469 static const ARMCPRegInfo cortexa15_cp_reginfo[] = { 575 static const ARMCPRegInfo cortexr5_cp_reginfo[] = { 615 static const ARMCPRegInfo cortex_r52_cp_reginfo[] = {
|
H A D | cpu64.c | 461 static CPAccessResult access_actlr_w(CPUARMState *env, const ARMCPRegInfo *r, in access_actlr_w() 479 static const ARMCPRegInfo neoverse_n1_cp_reginfo[] = { 555 static const ARMCPRegInfo neoverse_v1_cp_reginfo[] = { 751 static const ARMCPRegInfo cortex_a710_cp_reginfo[] = { 974 static const ARMCPRegInfo neoverse_n2_cp_reginfo[] = {
|
H A D | translate.c | 2937 const ARMCPRegInfo *ri = get_arm_cp_reginfo(s->cp_regs, key); in do_coproc_insn()
|
H A D | translate-a64.c | 2271 const ARMCPRegInfo *ri = get_arm_cp_reginfo(s->cp_regs, key); in handle_sys()
|
/openbmc/qemu/target/arm/hvf/ |
H A D | hvf.c | 662 const ARMCPRegInfo *ri; in hvf_get_registers() 1019 const ARMCPRegInfo *ri; in hvf_arch_init_vcpu() 1242 const ARMCPRegInfo *ri; in hvf_sysreg_read_cp() 1521 const ARMCPRegInfo *ri; in hvf_sysreg_write_cp()
|