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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/
H A Dxtensa.c22 #include <engine/xtensa.h>
30 struct nvkm_xtensa *xtensa = nvkm_xtensa(oclass->engine); in nvkm_xtensa_oclass_get() local
33 while (xtensa->func->sclass[c].oclass) { in nvkm_xtensa_oclass_get()
35 oclass->base = xtensa->func->sclass[index]; in nvkm_xtensa_oclass_get()
59 struct nvkm_xtensa *xtensa = nvkm_xtensa(engine); in nvkm_xtensa_intr() local
60 struct nvkm_subdev *subdev = &xtensa->engine.subdev; in nvkm_xtensa_intr()
62 const u32 base = xtensa->addr; in nvkm_xtensa_intr()
74 nvkm_mask(device, xtensa->addr + 0xd94, 0, xtensa->func->fifo_val); in nvkm_xtensa_intr()
81 struct nvkm_xtensa *xtensa = nvkm_xtensa(engine); in nvkm_xtensa_fini() local
82 struct nvkm_device *device = xtensa->engine.subdev.device; in nvkm_xtensa_fini()
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/openbmc/u-boot/doc/
H A DREADME.xtensa1 U-Boot for the Xtensa Architecture
4 Xtensa Architecture and Diamond Cores
7 Xtensa is a configurable processor architecture from Tensilica, Inc.
11 Xtensa licensees create their own Xtensa cores with selected features
13 is configured with Tensilica tools and built with Tensilica's Xtensa
16 There are an effectively infinite number of CPUs in the Xtensa
18 Xtensa CPUs in U-Boot. Therefore, there is only a single 'xtensa' CPU
21 In the same manner as the Linux port to Xtensa, U-Boot adapts to an
22 individual Xtensa core configuration using a set of macros provided with
33 a variant-specific directory located in the arch/xtensa/include/asm
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/openbmc/qemu/target/xtensa/
H A Dimport_core.sh11 overlay-archive-to-import: file name of xtensa-config-overlay.tar.gz
23 xtensa/config/core-isa.h \
24 xtensa/config/core-matmap.h
25 tar -xf "$OVERLAY" -O gdb/xtensa-config.c | \
28 # Fix up known issues in the xtensa-modules.c
30 tar -xf "$OVERLAY" -O binutils/xtensa-modules.c | \
37 -e 's/#include <xtensa-isa.h>/#include "xtensa-isa.h"/' \
39 > "$TARGET"/xtensa-modules.c.inc
52 #include "core-$NAME/xtensa-modules.c.inc"
H A Dmeson.build15 'xtensa-isa.c',
23 'xtensa-semi.c',
26 target_arch += {'xtensa': xtensa_ss}
27 target_system_arch += {'xtensa': xtensa_system_ss}
/openbmc/qemu/tests/docker/dockerfiles/
H A Ddebian-xtensa-cross.docker5 # using a prebuilt toolchains for Xtensa cores from:
6 # https://github.com/foss-xtensa/toolchain/releases
26 …curl -#SL http://github.com/foss-xtensa/toolchain/releases/download/$TOOLCHAIN_RELEASE/x86_64-$TOO…
30 …SE/xtensa-dc232b-elf/bin:/opt/$TOOLCHAIN_RELEASE/xtensa-dc233c-elf/bin:/opt/$TOOLCHAIN_RELEASE/xte…
/openbmc/qemu/docs/system/
H A Dtarget-xtensa.rst3 Xtensa System emulator
6 Two executables cover simulation of both Xtensa endian options,
7 ``qemu-system-xtensa`` and ``qemu-system-xtensaeb``. Two different
10 - Xtensa emulator pseudo board \"sim\"
17 - A range of Xtensa CPUs, default is the DC232B
23 - A range of Xtensa CPUs, default is the DC232B
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dcdns,xtensa-mx.txt1 * Xtensa Interrupt Distributor and Programmable Interrupt Controller (MX)
4 - compatible: Should be "cdns,xtensa-mx".
6 Remaining properties have exact same meaning as in Xtensa PIC
7 (see cdns,xtensa-pic.txt).
11 compatible = "cdns,xtensa-mx";
H A Dcdns,xtensa-pic.txt1 * Xtensa built-in Programmable Interrupt Controller (PIC)
4 - compatible: Should be "cdns,xtensa-pic".
18 compatible = "cdns,xtensa-pic";
/openbmc/linux/drivers/gpio/
H A Dgpio-xtensa.c6 * Driver for the Xtensa LX4 GPIO32 Option
8 * Documentation: Xtensa LX4 Microprocessor Data Book, Section 2.22
10 * GPIO32 is a standard optional extension to the Xtensa architecture core that
17 * (Coprocessor Enable Bits) register. By default Xtensa Linux startup code
37 #error GPIO32 option is not enabled for your xtensa core variant
155 .name = "xtensa-gpio",
164 pdev = platform_device_register_simple("xtensa-gpio", 0, NULL, 0); in xtensa_gpio_init()
173 MODULE_DESCRIPTION("Xtensa LX4 GPIO32 driver");
/openbmc/linux/arch/xtensa/
H A DMakefile51 vardirs := $(patsubst %,arch/xtensa/variants/%/,$(variant-y))
52 plfdirs := $(patsubst %,arch/xtensa/platforms/%/,$(platform-y))
58 libs-y += arch/xtensa/lib/
60 boot := arch/xtensa/boot
66 $(Q)$(MAKE) $(build)=arch/xtensa/kernel/syscalls all
70 @echo '* zImage - Compressed kernel image (arch/xtensa/boot/images/zImage.*)'
H A DKconfig2 config XTENSA config
58 Xtensa processors are 32-bit RISC machines designed by Tensilica
60 configurable and extensible. The Linux port to the Xtensa
62 with reasonable minimum requirements. The Xtensa Linux project has
63 a home page at <http://www.linux-xtensa.org/>.
113 prompt "Xtensa Processor Configuration"
135 bool "Custom Xtensa processor configuration"
138 Select this variant to use a custom Xtensa processor configuration.
143 string "Xtensa Processor Custom Core Variant Name"
146 Provide the name of a custom Xtensa processor variant.
[all …]
/openbmc/u-boot/arch/xtensa/
H A DKconfig1 menu "Xtensa architecture"
2 depends on XTENSA
6 default "xtensa"
9 string "Xtensa Core Variant"
H A DMakefile3 head-y := arch/xtensa/cpu/start.o
5 libs-y += arch/xtensa/cpu/
6 libs-y += arch/xtensa/lib/
/openbmc/linux/tools/arch/xtensa/include/uapi/asm/
H A Dmman.h38 /* MADV_HWPOISON is undefined on xtensa, fix it for perf */
40 /* MADV_SOFT_OFFLINE is undefined on xtensa, fix it for perf */
42 /* MAP_32BIT is undefined on xtensa, fix it for perf */
44 /* MAP_UNINITIALIZED is undefined on xtensa, fix it for perf */
/openbmc/qemu/hw/xtensa/
H A Dsim.c77 xtensa_create_memory_regions(&env->config->instrom, "xtensa.instrom", in xtensa_sim_common_init()
79 xtensa_create_memory_regions(&env->config->instram, "xtensa.instram", in xtensa_sim_common_init()
81 xtensa_create_memory_regions(&env->config->datarom, "xtensa.datarom", in xtensa_sim_common_init()
83 xtensa_create_memory_regions(&env->config->dataram, "xtensa.dataram", in xtensa_sim_common_init()
85 xtensa_create_memory_regions(&env->config->sysrom, "xtensa.sysrom", in xtensa_sim_common_init()
87 xtensa_create_memory_regions(&sysram, "xtensa.sysram", in xtensa_sim_common_init()
H A DKconfig3 depends on XTENSA
9 depends on XTENSA
17 depends on XTENSA && FDT
/openbmc/linux/arch/xtensa/boot/boot-redboot/
H A DMakefile7 OBJCOPY_ARGS := -O $(if $(CONFIG_CPU_BIG_ENDIAN),elf32-xtensa-be,elf32-xtensa-le)
13 LIBS := arch/xtensa/boot/lib/lib.a arch/xtensa/lib/lib.a
/openbmc/linux/drivers/irqchip/
H A Dirq-xtensa-pic.c2 * Xtensa built-in interrupt controller
19 #include <linux/irqchip/xtensa-pic.h>
83 .name = "xtensa",
110 IRQCHIP_DECLARE(xtensa_irq_chip, "cdns,xtensa-pic", xtensa_pic_init);
/openbmc/linux/arch/xtensa/boot/dts/
H A Dcsp.dts5 compatible = "cdns,xtensa-xtfpga";
23 compatible = "cdns,xtensa-cpu";
29 compatible = "cdns,xtensa-pic";
H A Dvirt.dts5 compatible = "cdns,xtensa-iss";
23 compatible = "cdns,xtensa-cpu";
38 compatible = "cdns,xtensa-pic";
/openbmc/linux/arch/xtensa/include/uapi/asm/
H A Dshmbuf.h3 * include/asm-xtensa/shmbuf.h
5 * The shmid64_ds structure for Xtensa architecture.
8 * side for big-endian xtensa, for historic reasons.
/openbmc/linux/arch/xtensa/include/asm/
H A Ddma.h2 * include/asm-xtensa/dma.h
18 * By default this is not true on an Xtensa processor,
35 * space for the kernel. For the Xtensa architecture, this
/openbmc/qemu/tests/tcg/xtensa/
H A DMakefile.softmmu-target2 # Xtensa system tests
8 XTENSA_SRC = $(SRC_PATH)/tests/tcg/xtensa
21 INCLUDE_DIRS = $(SRC_PATH)/target/xtensa/core-$(CORE)
/openbmc/linux/arch/xtensa/kernel/
H A Dmcount.S2 * arch/xtensa/kernel/mcount.S
4 * Xtensa specific mcount support
78 #error Unsupported Xtensa ABI
/openbmc/linux/arch/xtensa/variants/fsf/include/variant/
H A Dtie.h2 * This header file describes this specific Xtensa processor's TIE extensions
3 * that extend basic Xtensa core functionality. It is customized to this
4 * Xtensa processor configuration.

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