/openbmc/linux/Documentation/driver-api/usb/ |
H A D | writing_musb_glue_layer.rst | 2 Writing a MUSB Glue Layer 10 The Linux MUSB subsystem is part of the larger Linux USB subsystem. It 11 provides support for embedded USB Device Controllers (UDC) that do not 15 Instead, these embedded UDC rely on the USB On-the-Go (OTG) 17 reference design used in most cases is the Multipoint USB Highspeed 18 Dual-Role Controller (MUSB HDRC) found in the Mentor Graphics Inventra™ 21 As a self-taught exercise I have written an MUSB glue layer for the 22 Ingenic JZ4740 SoC, modelled after the many MUSB glue layers in the 24 ``drivers/usb/musb/jz4740.c``. In this documentation I will walk through the 25 basics of the ``jz4740.c`` glue layer, explaining the different pieces and [all …]
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/openbmc/linux/Documentation/devicetree/bindings/soc/socionext/ |
H A D | socionext,uniphier-soc-glue.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-soc-glue.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Socionext UniPhier SoC-glue logic 10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> 13 SoC-glue logic implemented on Socionext UniPhier SoCs is a collection of 19 - enum: 20 - socionext,uniphier-ld4-soc-glue 21 - socionext,uniphier-pro4-soc-glue [all …]
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/openbmc/linux/drivers/usb/dwc2/ |
H A D | pci.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * pci.c - DesignWare HS OTG Controller PCI driver 5 * Copyright (C) 2004-2013 Synopsys, Inc. 20 #include <linux/usb.h> 22 #include <linux/usb/hcd.h> 23 #include <linux/usb/ch11.h> 25 #include <linux/usb/usb_phy_generic.h> 29 static const char dwc2_driver_name[] = "dwc2-pci"; 37 * dwc2_pci_remove() - Provides the cleanup entry points for the DWC_otg PCI 44 struct dwc2_pci_glue *glue = pci_get_drvdata(pci); in dwc2_pci_remove() local [all …]
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/openbmc/u-boot/drivers/usb/dwc3/ |
H A D | dwc3-generic.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Generic DWC3 Glue layer 5 * Copyright (C) 2016 - 2018 Xilinx, Inc. 7 * Based on dwc3-omap.c. 11 #include <asm-generic/io.h> 13 #include <dm/device-internal.h> 15 #include <dwc3-uboot.h> 16 #include <linux/usb/ch9.h> 17 #include <linux/usb/gadget.h> 19 #include <usb.h> [all …]
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/openbmc/u-boot/drivers/usb/musb-new/ |
H A D | sunxi.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Allwinner SUNXI "glue layer" 9 * Copyright 2007-2012 (C) Allwinner Technology Co., Ltd. 12 * Based on the DA8xx "glue layer" code. 13 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com> 14 * Copyright (C) 2005-2006 by Texas Instruments 21 #include <generic-phy.h> 22 #include <phy-sun4i-usb.h> 27 #include <asm-generic/gpio.h> 30 #include <linux/usb/musb.h> [all …]
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H A D | pic32.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Microchip PIC32 MUSB "glue layer" 9 * Based on the dsps "glue layer" code. 13 #include <linux/usb/musb.h> 14 #include "linux-compat.h" 30 #define USBCRCON_USBIE BIT(2) /* Enable USB General interrupt */ 32 #define USBCRCON_BSVALMONEN BIT(4) /* Enable B-Device VBUS monitoring */ 33 #define USBCRCON_ASVALMONEN BIT(5) /* Enable A-Device VBUS monitoring */ 36 #define USBCRCON_USBIDVAL BIT(8) /* USB ID value */ 37 #define USBCRCON_USBIDOVEN BIT(9) /* USB ID override enable */ [all …]
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H A D | am35x.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Texas Instruments AM35x "glue layer" 7 * Based on the DA8xx "glue layer" code. 8 * Copyright (c) 2008-2009, MontaVista Software, Inc. <source@mvista.com> 21 #include <linux/dma-mapping.h> 23 #include <plat/usb.h> 27 #include "linux-compat.h" 35 /* USB 2.0 OTG module registers */ 64 /* USB interrupt register bits */ 83 #define glue_to_musb(g) platform_get_drvdata(g->musb) [all …]
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/openbmc/linux/drivers/usb/chipidea/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 12 Say Y here if your system has a dual role high speed USB 14 Dual-role switch (ID, OTG FSM, sysfs), Host-only, and 15 Peripheral-only. 37 tristate "Enable PCI glue driver" if EXPERT 43 tristate "Enable MSM hsusb glue driver" if EXPERT 47 tristate "Enable NPCM hsusb glue driver" if EXPERT 51 tristate "Enable i.MX USB glue driver" if EXPERT 56 tristate "Enable generic USB2 glue driver" if EXPERT 60 tristate "Enable Tegra USB glue driver" if EXPERT
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/openbmc/linux/Documentation/devicetree/bindings/usb/ |
H A D | dwc3-st.txt | 1 ST DWC3 glue logic 3 This file documents the parameters for the dwc3-st driver. 4 This driver controls the glue logic used to configure the dwc3 core on 8 - compatible : must be "st,stih407-dwc3" 9 - reg : glue logic base address and USB syscfg ctrl register offset 10 - reg-names : should be "reg-glue" and "syscfg-reg" 11 - st,syscon : should be phandle to system configuration node which 12 encompasses the glue registers 13 - resets : list of phandle and reset specifier pairs. There should be two entries, one 15 - reset-names : list of reset signal names. Names should be "powerdown" and "softreset" [all …]
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H A D | amlogic,meson-g12a-usb-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Amlogic Meson G12A DWC3 USB SoC Controller Glue 11 - Neil Armstrong <neil.armstrong@linaro.org> 14 The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3 15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY. 20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. [all …]
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H A D | am33xx-usb.txt | 3 - compatible: ti,am33xx-usb 4 - reg: offset and length of the usbss register sets 5 - ti,hwmods : must be "usb_otg_hs" 7 The glue layer contains multiple child nodes. It is required to have 8 at least a control module node, USB node and a PHY node. The second USB 13 - compatible: ti,am335x-usb-ctrl-module 14 - reg: offset and length of the "USB control registers" in the "Control 15 Module" block. A second offset and length for the USB wake up control 17 - reg-names: "phy_ctrl" for the "USB control registers" and "wakeup" for 18 the USB wake up control register. [all …]
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H A D | omap-usb.txt | 1 OMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS 3 OMAP MUSB GLUE 4 - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb" 5 - ti,hwmods : must be "usb_otg_hs" 6 - multipoint : Should be "1" indicating the musb controller supports 7 multipoint. This is a MUSB configuration-specific setting. 8 - num-eps : Specifies the number of endpoints. This is also a 9 MUSB configuration-specific setting. Should be set to "16" 10 - ram-bits : Specifies the ram address size. Should be set to "12" 11 - interface-type : This is a board specific setting to describe the type of [all …]
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H A D | mediatek,mtu3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 - $ref: usb-drd.yaml 17 The DRD controller has a glue layer IPPC (IP Port Control), and its host is 23 - enum: 24 - mediatek,mt2712-mtu3 25 - mediatek,mt8173-mtu3 [all …]
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H A D | mediatek,mtk-xhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 - $ref: usb-xhci.yaml 19 case 2: supports dual-role mode, and the host is based on xHCI driver. 25 - enum: 26 - mediatek,mt2701-xhci 27 - mediatek,mt2712-xhci [all …]
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/openbmc/linux/drivers/usb/musb/ |
H A D | sunxi.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Allwinner sun4i MUSB Glue Layer 18 #include <linux/phy/phy-sun4i-usb.h> 22 #include <linux/usb/musb.h> 23 #include <linux/usb/of.h> 24 #include <linux/usb/usb_phy_generic.h> 99 struct sunxi_glue *glue = container_of(work, struct sunxi_glue, work); in sunxi_musb_work() local 102 if (!test_bit(SUNXI_MUSB_FL_ENABLED, &glue->flags)) in sunxi_musb_work() 105 if (test_and_clear_bit(SUNXI_MUSB_FL_HOSTMODE_PEND, &glue->flags)) { in sunxi_musb_work() 106 struct musb *musb = glue->musb; in sunxi_musb_work() [all …]
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H A D | omap2430.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2005-2007 by Texas Instruments 20 #include <linux/dma-mapping.h> 24 #include <linux/usb/musb.h> 41 #define glue_to_musb(g) platform_get_drvdata(g->musb) 50 l = musb_readl(musb->mregs, OTG_FORCESTDBY); in omap2430_low_level_exit() 52 musb_writel(musb->mregs, OTG_FORCESTDBY, l); in omap2430_low_level_exit() 59 l = musb_readl(musb->mregs, OTG_FORCESTDBY); in omap2430_low_level_init() 61 musb_writel(musb->mregs, OTG_FORCESTDBY, l); in omap2430_low_level_init() 66 struct omap2430_glue *glue = _glue; in omap2430_musb_mailbox() local [all …]
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H A D | jz4740.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Ingenic JZ4740 "glue layer" 9 #include <linux/dma-mapping.h> 16 #include <linux/usb/role.h> 17 #include <linux/usb/usb_phy_generic.h> 34 if (IS_ENABLED(CONFIG_USB_INVENTRA_DMA) && musb->dma_controller) in jz4740_musb_interrupt() 35 retval_dma = dma_controller_irq(irq, musb->dma_controller); in jz4740_musb_interrupt() 37 spin_lock_irqsave(&musb->lock, flags); in jz4740_musb_interrupt() 39 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB); in jz4740_musb_interrupt() 40 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX); in jz4740_musb_interrupt() [all …]
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H A D | mediatek.c | 1 // SPDX-License-Identifier: GPL-2.0 11 #include <linux/dma-mapping.h> 16 #include <linux/usb/role.h> 17 #include <linux/usb/usb_phy_generic.h> 55 static int mtk_musb_clks_get(struct mtk_glue *glue) in mtk_musb_clks_get() argument 57 struct device *dev = glue->dev; in mtk_musb_clks_get() 59 glue->clks[0].id = "main"; in mtk_musb_clks_get() 60 glue->clks[1].id = "mcu"; in mtk_musb_clks_get() 61 glue->clks[2].id = "univpll"; in mtk_musb_clks_get() 63 return devm_clk_bulk_get(dev, MTK_MUSB_CLKS_NUM, glue->clks); in mtk_musb_clks_get() [all …]
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H A D | da8xx.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Texas Instruments DA8xx/OMAP-L1x "glue layer" 5 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com> 7 * Based on the DaVinci "glue layer" code. 8 * Copyright (C) 2005-2006 by Texas Instruments 23 #include <linux/dma-mapping.h> 24 #include <linux/usb/usb_phy_generic.h> 32 /* USB 2.0 OTG module registers */ 46 #define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2)) 54 /* USB interrupt register bits */ [all …]
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H A D | musb_dsps.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Texas Instruments DSPS platforms "glue layer" 7 * Based on the am35x "glue layer" code. 21 #include <linux/dma-mapping.h> 24 #include <linux/usb/usb_phy_generic.h> 25 #include <linux/platform_data/usb-omap.h> 30 #include <linux/usb/of.h> 99 * DSPS glue structure. 133 static void dsps_mod_timer(struct dsps_glue *glue, int wait_ms) in dsps_mod_timer() argument 135 struct musb *musb = platform_get_drvdata(glue->musb); in dsps_mod_timer() [all …]
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H A D | mpfs.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * PolarFire SoC (MPFS) MUSB Glue Layer 5 * Copyright (c) 2020-2022 Microchip Corporation. All rights reserved. 11 #include <linux/dma-mapping.h> 18 #include <linux/usb/usb_phy_generic.h> 58 spin_lock_irqsave(&musb->lock, flags); in mpfs_musb_interrupt() 60 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB); in mpfs_musb_interrupt() 61 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX); in mpfs_musb_interrupt() 62 musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX); in mpfs_musb_interrupt() 64 if (musb->int_usb || musb->int_tx || musb->int_rx) { in mpfs_musb_interrupt() [all …]
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/openbmc/linux/drivers/usb/dwc3/ |
H A D | dwc3-st.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dwc3-st.c Support for dwc3 platform devices on ST Microelectronics platforms 5 * This is a small driver for the dwc3 to provide the glue logic 14 * Inspired by dwc3-omap.c and dwc3-exynos.c. 31 #include <linux/usb/of.h> 36 /* glue registers */ 78 * struct st_dwc3 - dwc3-st driver private structure 80 * @glue_base: ioaddr for the glue registers 82 * @syscfg_reg_off: usb syscfg control offset 120 err = regmap_read(dwc3_data->regmap, dwc3_data->syscfg_reg_off, &val); in st_dwc3_drd_init() [all …]
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/openbmc/linux/Documentation/driver-api/media/drivers/ |
H A D | pvrusb2.rst | 1 .. SPDX-License-Identifier: GPL-2.0 9 ---------- 11 This driver is intended for the "Hauppauge WinTV PVR USB 2.0", which 12 is a USB 2.0 hosted TV Tuner. This driver is a work in progress. 13 Its history started with the reverse-engineering effort by Björn 29 1. Low level wire-protocol implementation with the device. 38 tear-down, arbitration, and interaction with high level 42 5. High level interfaces which glue the driver to various published 61 -------- 70 -------------------------------------- [all …]
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/openbmc/u-boot/drivers/usb/host/ |
H A D | dwc3-sti-glue.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * STiH407 family DWC3 specific Glue layer 5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved 17 #include <reset-uclass.h> 19 #include <usb.h> 21 #include <linux/usb/dwc3.h> 22 #include <linux/usb/otg.h> 23 #include <dwc3-sti-glue.h> 28 * struct sti_dwc3_glue_platdata - dwc3 STi glue driver private structure 29 * @syscfg_base: addr for the glue syscfg [all …]
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/openbmc/u-boot/doc/device-tree-bindings/usb/ |
H A D | dwc3-st.txt | 1 ST DWC3 glue logic 3 This file documents the parameters for the dwc3-st driver. 4 This driver controls the glue logic used to configure the dwc3 core on 8 - compatible : must be "st,stih407-dwc3" 9 - reg : glue logic base address and USB syscfg ctrl register offset 10 - reg-names : should be "reg-glue" and "syscfg-reg" 11 - st,syscon : should be phandle to system configuration node which 12 encompasses the glue registers 13 - resets : list of phandle and reset specifier pairs. There should be two entries, one 15 - reset-names : list of reset signal names. Names should be "powerdown" and "softreset" [all …]
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