xref: /openbmc/linux/drivers/usb/musb/mediatek.c (revision c900529f3d9161bfde5cca0754f83b4d3c3e0220)
10990366bSMin Guo // SPDX-License-Identifier: GPL-2.0
20990366bSMin Guo /*
30990366bSMin Guo  * Copyright (C) 2019 MediaTek Inc.
40990366bSMin Guo  *
50990366bSMin Guo  * Author:
60990366bSMin Guo  *  Min Guo <min.guo@mediatek.com>
70990366bSMin Guo  *  Yonglong Wu <yonglong.wu@mediatek.com>
80990366bSMin Guo  */
90990366bSMin Guo 
100990366bSMin Guo #include <linux/clk.h>
110990366bSMin Guo #include <linux/dma-mapping.h>
120990366bSMin Guo #include <linux/module.h>
13*484468fbSRob Herring #include <linux/of.h>
140990366bSMin Guo #include <linux/of_platform.h>
150990366bSMin Guo #include <linux/platform_device.h>
160990366bSMin Guo #include <linux/usb/role.h>
170990366bSMin Guo #include <linux/usb/usb_phy_generic.h>
180990366bSMin Guo #include "musb_core.h"
190990366bSMin Guo #include "musb_dma.h"
200990366bSMin Guo 
210990366bSMin Guo #define USB_L1INTS		0x00a0
220990366bSMin Guo #define USB_L1INTM		0x00a4
230990366bSMin Guo #define MTK_MUSB_TXFUNCADDR	0x0480
240990366bSMin Guo 
250990366bSMin Guo /* MediaTek controller toggle enable and status reg */
260990366bSMin Guo #define MUSB_RXTOG		0x80
270990366bSMin Guo #define MUSB_RXTOGEN		0x82
280990366bSMin Guo #define MUSB_TXTOG		0x84
290990366bSMin Guo #define MUSB_TXTOGEN		0x86
300990366bSMin Guo #define MTK_TOGGLE_EN		GENMASK(15, 0)
310990366bSMin Guo 
320990366bSMin Guo #define TX_INT_STATUS		BIT(0)
330990366bSMin Guo #define RX_INT_STATUS		BIT(1)
340990366bSMin Guo #define USBCOM_INT_STATUS	BIT(2)
350990366bSMin Guo #define DMA_INT_STATUS		BIT(3)
360990366bSMin Guo 
370990366bSMin Guo #define DMA_INTR_STATUS_MSK	GENMASK(7, 0)
380990366bSMin Guo #define DMA_INTR_UNMASK_SET_MSK	GENMASK(31, 24)
390990366bSMin Guo 
405c29e864SAngeloGioacchino Del Regno #define MTK_MUSB_CLKS_NUM	3
415c29e864SAngeloGioacchino Del Regno 
420990366bSMin Guo struct mtk_glue {
430990366bSMin Guo 	struct device *dev;
440990366bSMin Guo 	struct musb *musb;
450990366bSMin Guo 	struct platform_device *musb_pdev;
460990366bSMin Guo 	struct platform_device *usb_phy;
470990366bSMin Guo 	struct phy *phy;
480990366bSMin Guo 	struct usb_phy *xceiv;
490990366bSMin Guo 	enum phy_mode phy_mode;
505c29e864SAngeloGioacchino Del Regno 	struct clk_bulk_data clks[MTK_MUSB_CLKS_NUM];
510990366bSMin Guo 	enum usb_role role;
520990366bSMin Guo 	struct usb_role_switch *role_sw;
530990366bSMin Guo };
540990366bSMin Guo 
mtk_musb_clks_get(struct mtk_glue * glue)550990366bSMin Guo static int mtk_musb_clks_get(struct mtk_glue *glue)
560990366bSMin Guo {
570990366bSMin Guo 	struct device *dev = glue->dev;
580990366bSMin Guo 
595c29e864SAngeloGioacchino Del Regno 	glue->clks[0].id = "main";
605c29e864SAngeloGioacchino Del Regno 	glue->clks[1].id = "mcu";
615c29e864SAngeloGioacchino Del Regno 	glue->clks[2].id = "univpll";
620990366bSMin Guo 
635c29e864SAngeloGioacchino Del Regno 	return devm_clk_bulk_get(dev, MTK_MUSB_CLKS_NUM, glue->clks);
640990366bSMin Guo }
650990366bSMin Guo 
mtk_otg_switch_set(struct mtk_glue * glue,enum usb_role role)66bce3052fSHeikki Krogerus static int mtk_otg_switch_set(struct mtk_glue *glue, enum usb_role role)
670990366bSMin Guo {
680990366bSMin Guo 	struct musb *musb = glue->musb;
690990366bSMin Guo 	u8 devctl = readb(musb->mregs + MUSB_DEVCTL);
700990366bSMin Guo 	enum usb_role new_role;
710990366bSMin Guo 
720990366bSMin Guo 	if (role == glue->role)
730990366bSMin Guo 		return 0;
740990366bSMin Guo 
750990366bSMin Guo 	switch (role) {
760990366bSMin Guo 	case USB_ROLE_HOST:
770990366bSMin Guo 		musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
780990366bSMin Guo 		glue->phy_mode = PHY_MODE_USB_HOST;
790990366bSMin Guo 		new_role = USB_ROLE_HOST;
800990366bSMin Guo 		if (glue->role == USB_ROLE_NONE)
810990366bSMin Guo 			phy_power_on(glue->phy);
820990366bSMin Guo 
830990366bSMin Guo 		devctl |= MUSB_DEVCTL_SESSION;
840990366bSMin Guo 		musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
850990366bSMin Guo 		MUSB_HST_MODE(musb);
860990366bSMin Guo 		break;
870990366bSMin Guo 	case USB_ROLE_DEVICE:
880990366bSMin Guo 		musb->xceiv->otg->state = OTG_STATE_B_IDLE;
890990366bSMin Guo 		glue->phy_mode = PHY_MODE_USB_DEVICE;
900990366bSMin Guo 		new_role = USB_ROLE_DEVICE;
910990366bSMin Guo 		devctl &= ~MUSB_DEVCTL_SESSION;
920990366bSMin Guo 		musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
930990366bSMin Guo 		if (glue->role == USB_ROLE_NONE)
940990366bSMin Guo 			phy_power_on(glue->phy);
950990366bSMin Guo 
960990366bSMin Guo 		MUSB_DEV_MODE(musb);
970990366bSMin Guo 		break;
980990366bSMin Guo 	case USB_ROLE_NONE:
990990366bSMin Guo 		glue->phy_mode = PHY_MODE_USB_OTG;
1000990366bSMin Guo 		new_role = USB_ROLE_NONE;
1010990366bSMin Guo 		devctl &= ~MUSB_DEVCTL_SESSION;
1020990366bSMin Guo 		musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
1030990366bSMin Guo 		if (glue->role != USB_ROLE_NONE)
1040990366bSMin Guo 			phy_power_off(glue->phy);
1050990366bSMin Guo 
1060990366bSMin Guo 		break;
1070990366bSMin Guo 	default:
1080990366bSMin Guo 		dev_err(glue->dev, "Invalid State\n");
1090990366bSMin Guo 		return -EINVAL;
1100990366bSMin Guo 	}
1110990366bSMin Guo 
1120990366bSMin Guo 	glue->role = new_role;
1130990366bSMin Guo 	phy_set_mode(glue->phy, glue->phy_mode);
1140990366bSMin Guo 
1150990366bSMin Guo 	return 0;
1160990366bSMin Guo }
1170990366bSMin Guo 
musb_usb_role_sx_set(struct usb_role_switch * sw,enum usb_role role)118bce3052fSHeikki Krogerus static int musb_usb_role_sx_set(struct usb_role_switch *sw, enum usb_role role)
1190990366bSMin Guo {
120bce3052fSHeikki Krogerus 	return mtk_otg_switch_set(usb_role_switch_get_drvdata(sw), role);
121bce3052fSHeikki Krogerus }
122bce3052fSHeikki Krogerus 
musb_usb_role_sx_get(struct usb_role_switch * sw)123bce3052fSHeikki Krogerus static enum usb_role musb_usb_role_sx_get(struct usb_role_switch *sw)
124bce3052fSHeikki Krogerus {
125bce3052fSHeikki Krogerus 	struct mtk_glue *glue = usb_role_switch_get_drvdata(sw);
1260990366bSMin Guo 
1270990366bSMin Guo 	return glue->role;
1280990366bSMin Guo }
1290990366bSMin Guo 
mtk_otg_switch_init(struct mtk_glue * glue)1300990366bSMin Guo static int mtk_otg_switch_init(struct mtk_glue *glue)
1310990366bSMin Guo {
1320990366bSMin Guo 	struct usb_role_switch_desc role_sx_desc = { 0 };
1330990366bSMin Guo 
1340990366bSMin Guo 	role_sx_desc.set = musb_usb_role_sx_set;
1350990366bSMin Guo 	role_sx_desc.get = musb_usb_role_sx_get;
1367042b101SSungbo Eo 	role_sx_desc.allow_userspace_control = true;
1370990366bSMin Guo 	role_sx_desc.fwnode = dev_fwnode(glue->dev);
138bce3052fSHeikki Krogerus 	role_sx_desc.driver_data = glue;
1390990366bSMin Guo 	glue->role_sw = usb_role_switch_register(glue->dev, &role_sx_desc);
1400990366bSMin Guo 
1410990366bSMin Guo 	return PTR_ERR_OR_ZERO(glue->role_sw);
1420990366bSMin Guo }
1430990366bSMin Guo 
mtk_otg_switch_exit(struct mtk_glue * glue)1440990366bSMin Guo static void mtk_otg_switch_exit(struct mtk_glue *glue)
1450990366bSMin Guo {
1460990366bSMin Guo 	return usb_role_switch_unregister(glue->role_sw);
1470990366bSMin Guo }
1480990366bSMin Guo 
generic_interrupt(int irq,void * __hci)1490990366bSMin Guo static irqreturn_t generic_interrupt(int irq, void *__hci)
1500990366bSMin Guo {
1510990366bSMin Guo 	unsigned long flags;
1520990366bSMin Guo 	irqreturn_t retval = IRQ_NONE;
1530990366bSMin Guo 	struct musb *musb = __hci;
1540990366bSMin Guo 
1550990366bSMin Guo 	spin_lock_irqsave(&musb->lock, flags);
1560990366bSMin Guo 	musb->int_usb = musb_clearb(musb->mregs, MUSB_INTRUSB);
1570990366bSMin Guo 	musb->int_rx = musb_clearw(musb->mregs, MUSB_INTRRX);
1580990366bSMin Guo 	musb->int_tx = musb_clearw(musb->mregs, MUSB_INTRTX);
1590990366bSMin Guo 
160402bcac4SMacpaul Lin 	if ((musb->int_usb & MUSB_INTR_RESET) && !is_host_active(musb)) {
161402bcac4SMacpaul Lin 		/* ep0 FADDR must be 0 when (re)entering peripheral mode */
162402bcac4SMacpaul Lin 		musb_ep_select(musb->mregs, 0);
163402bcac4SMacpaul Lin 		musb_writeb(musb->mregs, MUSB_FADDR, 0);
164402bcac4SMacpaul Lin 	}
165402bcac4SMacpaul Lin 
1660990366bSMin Guo 	if (musb->int_usb || musb->int_tx || musb->int_rx)
1670990366bSMin Guo 		retval = musb_interrupt(musb);
1680990366bSMin Guo 
1690990366bSMin Guo 	spin_unlock_irqrestore(&musb->lock, flags);
1700990366bSMin Guo 
1710990366bSMin Guo 	return retval;
1720990366bSMin Guo }
1730990366bSMin Guo 
mtk_musb_interrupt(int irq,void * dev_id)1740990366bSMin Guo static irqreturn_t mtk_musb_interrupt(int irq, void *dev_id)
1750990366bSMin Guo {
1760990366bSMin Guo 	irqreturn_t retval = IRQ_NONE;
1770990366bSMin Guo 	struct musb *musb = (struct musb *)dev_id;
1780990366bSMin Guo 	u32 l1_ints;
1790990366bSMin Guo 
1800990366bSMin Guo 	l1_ints = musb_readl(musb->mregs, USB_L1INTS) &
1810990366bSMin Guo 			musb_readl(musb->mregs, USB_L1INTM);
1820990366bSMin Guo 
1830990366bSMin Guo 	if (l1_ints & (TX_INT_STATUS | RX_INT_STATUS | USBCOM_INT_STATUS))
1840990366bSMin Guo 		retval = generic_interrupt(irq, musb);
1850990366bSMin Guo 
1860990366bSMin Guo #if defined(CONFIG_USB_INVENTRA_DMA)
1870990366bSMin Guo 	if (l1_ints & DMA_INT_STATUS)
1880990366bSMin Guo 		retval = dma_controller_irq(irq, musb->dma_controller);
1890990366bSMin Guo #endif
1900990366bSMin Guo 	return retval;
1910990366bSMin Guo }
1920990366bSMin Guo 
mtk_musb_busctl_offset(u8 epnum,u16 offset)1930990366bSMin Guo static u32 mtk_musb_busctl_offset(u8 epnum, u16 offset)
1940990366bSMin Guo {
1950990366bSMin Guo 	return MTK_MUSB_TXFUNCADDR + offset + 8 * epnum;
1960990366bSMin Guo }
1970990366bSMin Guo 
mtk_musb_clearb(void __iomem * addr,unsigned int offset)1980990366bSMin Guo static u8 mtk_musb_clearb(void __iomem *addr, unsigned int offset)
1990990366bSMin Guo {
2000990366bSMin Guo 	u8 data;
2010990366bSMin Guo 
2020990366bSMin Guo 	/* W1C */
2030990366bSMin Guo 	data = musb_readb(addr, offset);
2040990366bSMin Guo 	musb_writeb(addr, offset, data);
2050990366bSMin Guo 	return data;
2060990366bSMin Guo }
2070990366bSMin Guo 
mtk_musb_clearw(void __iomem * addr,unsigned int offset)2080990366bSMin Guo static u16 mtk_musb_clearw(void __iomem *addr, unsigned int offset)
2090990366bSMin Guo {
2100990366bSMin Guo 	u16 data;
2110990366bSMin Guo 
2120990366bSMin Guo 	/* W1C */
2130990366bSMin Guo 	data = musb_readw(addr, offset);
2140990366bSMin Guo 	musb_writew(addr, offset, data);
2150990366bSMin Guo 	return data;
2160990366bSMin Guo }
2170990366bSMin Guo 
mtk_musb_set_mode(struct musb * musb,u8 mode)2180990366bSMin Guo static int mtk_musb_set_mode(struct musb *musb, u8 mode)
2190990366bSMin Guo {
2200990366bSMin Guo 	struct device *dev = musb->controller;
2210990366bSMin Guo 	struct mtk_glue *glue = dev_get_drvdata(dev->parent);
2220990366bSMin Guo 	enum phy_mode new_mode;
2230990366bSMin Guo 	enum usb_role new_role;
2240990366bSMin Guo 
2250990366bSMin Guo 	switch (mode) {
2260990366bSMin Guo 	case MUSB_HOST:
2270990366bSMin Guo 		new_mode = PHY_MODE_USB_HOST;
2280990366bSMin Guo 		new_role = USB_ROLE_HOST;
2290990366bSMin Guo 		break;
2300990366bSMin Guo 	case MUSB_PERIPHERAL:
2310990366bSMin Guo 		new_mode = PHY_MODE_USB_DEVICE;
2320990366bSMin Guo 		new_role = USB_ROLE_DEVICE;
2330990366bSMin Guo 		break;
2340990366bSMin Guo 	case MUSB_OTG:
2350990366bSMin Guo 		new_mode = PHY_MODE_USB_OTG;
2360990366bSMin Guo 		new_role = USB_ROLE_NONE;
2370990366bSMin Guo 		break;
2380990366bSMin Guo 	default:
2390990366bSMin Guo 		dev_err(glue->dev, "Invalid mode request\n");
2400990366bSMin Guo 		return -EINVAL;
2410990366bSMin Guo 	}
2420990366bSMin Guo 
2430990366bSMin Guo 	if (glue->phy_mode == new_mode)
2440990366bSMin Guo 		return 0;
2450990366bSMin Guo 
2460990366bSMin Guo 	if (musb->port_mode != MUSB_OTG) {
2470990366bSMin Guo 		dev_err(glue->dev, "Does not support changing modes\n");
2480990366bSMin Guo 		return -EINVAL;
2490990366bSMin Guo 	}
2500990366bSMin Guo 
251bce3052fSHeikki Krogerus 	mtk_otg_switch_set(glue, new_role);
2520990366bSMin Guo 	return 0;
2530990366bSMin Guo }
2540990366bSMin Guo 
mtk_musb_init(struct musb * musb)2550990366bSMin Guo static int mtk_musb_init(struct musb *musb)
2560990366bSMin Guo {
2570990366bSMin Guo 	struct device *dev = musb->controller;
2580990366bSMin Guo 	struct mtk_glue *glue = dev_get_drvdata(dev->parent);
2590990366bSMin Guo 	int ret;
2600990366bSMin Guo 
2610990366bSMin Guo 	glue->musb = musb;
2620990366bSMin Guo 	musb->phy = glue->phy;
2630990366bSMin Guo 	musb->xceiv = glue->xceiv;
2640990366bSMin Guo 	musb->is_host = false;
2650990366bSMin Guo 	musb->isr = mtk_musb_interrupt;
2660990366bSMin Guo 
2670990366bSMin Guo 	/* Set TX/RX toggle enable */
2680990366bSMin Guo 	musb_writew(musb->mregs, MUSB_TXTOGEN, MTK_TOGGLE_EN);
2690990366bSMin Guo 	musb_writew(musb->mregs, MUSB_RXTOGEN, MTK_TOGGLE_EN);
2700990366bSMin Guo 
2710990366bSMin Guo 	if (musb->port_mode == MUSB_OTG) {
2720990366bSMin Guo 		ret = mtk_otg_switch_init(glue);
2730990366bSMin Guo 		if (ret)
2740990366bSMin Guo 			return ret;
2750990366bSMin Guo 	}
2760990366bSMin Guo 
2770990366bSMin Guo 	ret = phy_init(glue->phy);
2780990366bSMin Guo 	if (ret)
2790990366bSMin Guo 		goto err_phy_init;
2800990366bSMin Guo 
2810990366bSMin Guo 	ret = phy_power_on(glue->phy);
2820990366bSMin Guo 	if (ret)
2830990366bSMin Guo 		goto err_phy_power_on;
2840990366bSMin Guo 
2850990366bSMin Guo 	phy_set_mode(glue->phy, glue->phy_mode);
2860990366bSMin Guo 
2870990366bSMin Guo #if defined(CONFIG_USB_INVENTRA_DMA)
2880990366bSMin Guo 	musb_writel(musb->mregs, MUSB_HSDMA_INTR,
2890990366bSMin Guo 		    DMA_INTR_STATUS_MSK | DMA_INTR_UNMASK_SET_MSK);
2900990366bSMin Guo #endif
2910990366bSMin Guo 	musb_writel(musb->mregs, USB_L1INTM, TX_INT_STATUS | RX_INT_STATUS |
2920990366bSMin Guo 		    USBCOM_INT_STATUS | DMA_INT_STATUS);
2930990366bSMin Guo 	return 0;
2940990366bSMin Guo 
2950990366bSMin Guo err_phy_power_on:
2960990366bSMin Guo 	phy_exit(glue->phy);
2970990366bSMin Guo err_phy_init:
298ba883de9SDan Carpenter 	if (musb->port_mode == MUSB_OTG)
2990990366bSMin Guo 		mtk_otg_switch_exit(glue);
3000990366bSMin Guo 	return ret;
3010990366bSMin Guo }
3020990366bSMin Guo 
mtk_musb_get_toggle(struct musb_qh * qh,int is_out)3030990366bSMin Guo static u16 mtk_musb_get_toggle(struct musb_qh *qh, int is_out)
3040990366bSMin Guo {
3050990366bSMin Guo 	struct musb *musb = qh->hw_ep->musb;
3060990366bSMin Guo 	u8 epnum = qh->hw_ep->epnum;
3070990366bSMin Guo 	u16 toggle;
3080990366bSMin Guo 
3090990366bSMin Guo 	toggle = musb_readw(musb->mregs, is_out ? MUSB_TXTOG : MUSB_RXTOG);
3100990366bSMin Guo 	return toggle & (1 << epnum);
3110990366bSMin Guo }
3120990366bSMin Guo 
mtk_musb_set_toggle(struct musb_qh * qh,int is_out,struct urb * urb)3130990366bSMin Guo static u16 mtk_musb_set_toggle(struct musb_qh *qh, int is_out, struct urb *urb)
3140990366bSMin Guo {
3150990366bSMin Guo 	struct musb *musb = qh->hw_ep->musb;
3160990366bSMin Guo 	u8 epnum = qh->hw_ep->epnum;
3170990366bSMin Guo 	u16 value, toggle;
3180990366bSMin Guo 
3190990366bSMin Guo 	toggle = usb_gettoggle(urb->dev, qh->epnum, is_out);
3200990366bSMin Guo 
3210990366bSMin Guo 	if (is_out) {
3220990366bSMin Guo 		value = musb_readw(musb->mregs, MUSB_TXTOG);
3230990366bSMin Guo 		value |= toggle << epnum;
3240990366bSMin Guo 		musb_writew(musb->mregs, MUSB_TXTOG, value);
3250990366bSMin Guo 	} else {
3260990366bSMin Guo 		value = musb_readw(musb->mregs, MUSB_RXTOG);
3270990366bSMin Guo 		value |= toggle << epnum;
3280990366bSMin Guo 		musb_writew(musb->mregs, MUSB_RXTOG, value);
3290990366bSMin Guo 	}
3300990366bSMin Guo 
3310990366bSMin Guo 	return 0;
3320990366bSMin Guo }
3330990366bSMin Guo 
mtk_musb_exit(struct musb * musb)3340990366bSMin Guo static int mtk_musb_exit(struct musb *musb)
3350990366bSMin Guo {
3360990366bSMin Guo 	struct device *dev = musb->controller;
3370990366bSMin Guo 	struct mtk_glue *glue = dev_get_drvdata(dev->parent);
3380990366bSMin Guo 
3390990366bSMin Guo 	mtk_otg_switch_exit(glue);
3400990366bSMin Guo 	phy_power_off(glue->phy);
3410990366bSMin Guo 	phy_exit(glue->phy);
3425c29e864SAngeloGioacchino Del Regno 	clk_bulk_disable_unprepare(MTK_MUSB_CLKS_NUM, glue->clks);
3430990366bSMin Guo 
3440990366bSMin Guo 	pm_runtime_put_sync(dev);
3450990366bSMin Guo 	pm_runtime_disable(dev);
3460990366bSMin Guo 	return 0;
3470990366bSMin Guo }
3480990366bSMin Guo 
3490990366bSMin Guo static const struct musb_platform_ops mtk_musb_ops = {
3500990366bSMin Guo 	.quirks = MUSB_DMA_INVENTRA,
3510990366bSMin Guo 	.init = mtk_musb_init,
3520990366bSMin Guo 	.get_toggle = mtk_musb_get_toggle,
3530990366bSMin Guo 	.set_toggle = mtk_musb_set_toggle,
3540990366bSMin Guo 	.exit = mtk_musb_exit,
3550990366bSMin Guo #ifdef CONFIG_USB_INVENTRA_DMA
3560990366bSMin Guo 	.dma_init = musbhs_dma_controller_create_noirq,
3570990366bSMin Guo 	.dma_exit = musbhs_dma_controller_destroy,
3580990366bSMin Guo #endif
3590990366bSMin Guo 	.clearb = mtk_musb_clearb,
3600990366bSMin Guo 	.clearw = mtk_musb_clearw,
3610990366bSMin Guo 	.busctl_offset = mtk_musb_busctl_offset,
3620990366bSMin Guo 	.set_mode = mtk_musb_set_mode,
3630990366bSMin Guo };
3640990366bSMin Guo 
3650990366bSMin Guo #define MTK_MUSB_MAX_EP_NUM	8
3660990366bSMin Guo #define MTK_MUSB_RAM_BITS	11
3670990366bSMin Guo 
3680990366bSMin Guo static struct musb_fifo_cfg mtk_musb_mode_cfg[] = {
3690990366bSMin Guo 	{ .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
3700990366bSMin Guo 	{ .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
3710990366bSMin Guo 	{ .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
3720990366bSMin Guo 	{ .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
3730990366bSMin Guo 	{ .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
3740990366bSMin Guo 	{ .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
3750990366bSMin Guo 	{ .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
3760990366bSMin Guo 	{ .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
3770990366bSMin Guo 	{ .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
3780990366bSMin Guo 	{ .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
3790990366bSMin Guo 	{ .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 1024, },
3800990366bSMin Guo 	{ .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 1024, },
3810990366bSMin Guo 	{ .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, },
3820990366bSMin Guo 	{ .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 64, },
3830990366bSMin Guo };
3840990366bSMin Guo 
3850990366bSMin Guo static const struct musb_hdrc_config mtk_musb_hdrc_config = {
3860990366bSMin Guo 	.fifo_cfg = mtk_musb_mode_cfg,
3870990366bSMin Guo 	.fifo_cfg_size = ARRAY_SIZE(mtk_musb_mode_cfg),
3880990366bSMin Guo 	.multipoint = true,
3890990366bSMin Guo 	.dyn_fifo = true,
3900990366bSMin Guo 	.num_eps = MTK_MUSB_MAX_EP_NUM,
3910990366bSMin Guo 	.ram_bits = MTK_MUSB_RAM_BITS,
3920990366bSMin Guo };
3930990366bSMin Guo 
3940990366bSMin Guo static const struct platform_device_info mtk_dev_info = {
3950990366bSMin Guo 	.name = "musb-hdrc",
3960990366bSMin Guo 	.id = PLATFORM_DEVID_AUTO,
3970990366bSMin Guo 	.dma_mask = DMA_BIT_MASK(32),
3980990366bSMin Guo };
3990990366bSMin Guo 
mtk_musb_probe(struct platform_device * pdev)4000990366bSMin Guo static int mtk_musb_probe(struct platform_device *pdev)
4010990366bSMin Guo {
4020990366bSMin Guo 	struct musb_hdrc_platform_data *pdata;
4030990366bSMin Guo 	struct mtk_glue *glue;
4040990366bSMin Guo 	struct platform_device_info pinfo;
4050990366bSMin Guo 	struct device *dev = &pdev->dev;
4060990366bSMin Guo 	struct device_node *np = dev->of_node;
407c87c2731SColin Ian King 	int ret;
4080990366bSMin Guo 
4090990366bSMin Guo 	glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL);
4100990366bSMin Guo 	if (!glue)
4110990366bSMin Guo 		return -ENOMEM;
4120990366bSMin Guo 
4130990366bSMin Guo 	glue->dev = dev;
4140990366bSMin Guo 	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
4150990366bSMin Guo 	if (!pdata)
4160990366bSMin Guo 		return -ENOMEM;
4170990366bSMin Guo 
4180990366bSMin Guo 	ret = of_platform_populate(np, NULL, NULL, dev);
4190990366bSMin Guo 	if (ret) {
4200990366bSMin Guo 		dev_err(dev, "failed to create child devices at %p\n", np);
4210990366bSMin Guo 		return ret;
4220990366bSMin Guo 	}
4230990366bSMin Guo 
4240990366bSMin Guo 	ret = mtk_musb_clks_get(glue);
4250990366bSMin Guo 	if (ret)
4260990366bSMin Guo 		return ret;
4270990366bSMin Guo 
4280990366bSMin Guo 	pdata->config = &mtk_musb_hdrc_config;
4290990366bSMin Guo 	pdata->platform_ops = &mtk_musb_ops;
4300990366bSMin Guo 	pdata->mode = usb_get_dr_mode(dev);
4310990366bSMin Guo 
4320990366bSMin Guo 	if (IS_ENABLED(CONFIG_USB_MUSB_HOST))
4330990366bSMin Guo 		pdata->mode = USB_DR_MODE_HOST;
4340990366bSMin Guo 	else if (IS_ENABLED(CONFIG_USB_MUSB_GADGET))
4350990366bSMin Guo 		pdata->mode = USB_DR_MODE_PERIPHERAL;
4360990366bSMin Guo 
4370990366bSMin Guo 	switch (pdata->mode) {
4380990366bSMin Guo 	case USB_DR_MODE_HOST:
4390990366bSMin Guo 		glue->phy_mode = PHY_MODE_USB_HOST;
4400990366bSMin Guo 		glue->role = USB_ROLE_HOST;
4410990366bSMin Guo 		break;
4420990366bSMin Guo 	case USB_DR_MODE_PERIPHERAL:
4430990366bSMin Guo 		glue->phy_mode = PHY_MODE_USB_DEVICE;
4440990366bSMin Guo 		glue->role = USB_ROLE_DEVICE;
4450990366bSMin Guo 		break;
4460990366bSMin Guo 	case USB_DR_MODE_OTG:
4470990366bSMin Guo 		glue->phy_mode = PHY_MODE_USB_OTG;
4480990366bSMin Guo 		glue->role = USB_ROLE_NONE;
4490990366bSMin Guo 		break;
4500990366bSMin Guo 	default:
4510990366bSMin Guo 		dev_err(&pdev->dev, "Error 'dr_mode' property\n");
4520990366bSMin Guo 		return -EINVAL;
4530990366bSMin Guo 	}
4540990366bSMin Guo 
4550990366bSMin Guo 	glue->phy = devm_of_phy_get_by_index(dev, np, 0);
4560990366bSMin Guo 	if (IS_ERR(glue->phy)) {
4570990366bSMin Guo 		dev_err(dev, "fail to getting phy %ld\n",
4580990366bSMin Guo 			PTR_ERR(glue->phy));
4590990366bSMin Guo 		return PTR_ERR(glue->phy);
4600990366bSMin Guo 	}
4610990366bSMin Guo 
4620990366bSMin Guo 	glue->usb_phy = usb_phy_generic_register();
4630990366bSMin Guo 	if (IS_ERR(glue->usb_phy)) {
4640990366bSMin Guo 		dev_err(dev, "fail to registering usb-phy %ld\n",
4650990366bSMin Guo 			PTR_ERR(glue->usb_phy));
4660990366bSMin Guo 		return PTR_ERR(glue->usb_phy);
4670990366bSMin Guo 	}
4680990366bSMin Guo 
4690990366bSMin Guo 	glue->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
4700990366bSMin Guo 	if (IS_ERR(glue->xceiv)) {
4710990366bSMin Guo 		ret = PTR_ERR(glue->xceiv);
472d9ff1096SChristophe JAILLET 		dev_err(dev, "fail to getting usb-phy %d\n", ret);
4730990366bSMin Guo 		goto err_unregister_usb_phy;
4740990366bSMin Guo 	}
4750990366bSMin Guo 
4760990366bSMin Guo 	platform_set_drvdata(pdev, glue);
4770990366bSMin Guo 	pm_runtime_enable(dev);
4780990366bSMin Guo 	pm_runtime_get_sync(dev);
4790990366bSMin Guo 
4805c29e864SAngeloGioacchino Del Regno 	ret = clk_bulk_prepare_enable(MTK_MUSB_CLKS_NUM, glue->clks);
4810990366bSMin Guo 	if (ret)
4820990366bSMin Guo 		goto err_enable_clk;
4830990366bSMin Guo 
4840990366bSMin Guo 	pinfo = mtk_dev_info;
4850990366bSMin Guo 	pinfo.parent = dev;
4860990366bSMin Guo 	pinfo.res = pdev->resource;
4870990366bSMin Guo 	pinfo.num_res = pdev->num_resources;
4880990366bSMin Guo 	pinfo.data = pdata;
4890990366bSMin Guo 	pinfo.size_data = sizeof(*pdata);
490cf081d00SRob Herring 	pinfo.fwnode = of_fwnode_handle(np);
491cf081d00SRob Herring 	pinfo.of_node_reused = true;
4920990366bSMin Guo 
4930990366bSMin Guo 	glue->musb_pdev = platform_device_register_full(&pinfo);
4940990366bSMin Guo 	if (IS_ERR(glue->musb_pdev)) {
4950990366bSMin Guo 		ret = PTR_ERR(glue->musb_pdev);
4960990366bSMin Guo 		dev_err(dev, "failed to register musb device: %d\n", ret);
4970990366bSMin Guo 		goto err_device_register;
4980990366bSMin Guo 	}
4990990366bSMin Guo 
5000990366bSMin Guo 	return 0;
5010990366bSMin Guo 
5020990366bSMin Guo err_device_register:
5035c29e864SAngeloGioacchino Del Regno 	clk_bulk_disable_unprepare(MTK_MUSB_CLKS_NUM, glue->clks);
5040990366bSMin Guo err_enable_clk:
5050990366bSMin Guo 	pm_runtime_put_sync(dev);
5060990366bSMin Guo 	pm_runtime_disable(dev);
5070990366bSMin Guo err_unregister_usb_phy:
5080990366bSMin Guo 	usb_phy_generic_unregister(glue->usb_phy);
5090990366bSMin Guo 	return ret;
5100990366bSMin Guo }
5110990366bSMin Guo 
mtk_musb_remove(struct platform_device * pdev)512ace4e263SUwe Kleine-König static void mtk_musb_remove(struct platform_device *pdev)
5130990366bSMin Guo {
5140990366bSMin Guo 	struct mtk_glue *glue = platform_get_drvdata(pdev);
5150990366bSMin Guo 	struct platform_device *usb_phy = glue->usb_phy;
5160990366bSMin Guo 
5170990366bSMin Guo 	platform_device_unregister(glue->musb_pdev);
5180990366bSMin Guo 	usb_phy_generic_unregister(usb_phy);
5190990366bSMin Guo }
5200990366bSMin Guo 
5210990366bSMin Guo #ifdef CONFIG_OF
5220990366bSMin Guo static const struct of_device_id mtk_musb_match[] = {
5230990366bSMin Guo 	{.compatible = "mediatek,mtk-musb",},
5240990366bSMin Guo 	{},
5250990366bSMin Guo };
5260990366bSMin Guo MODULE_DEVICE_TABLE(of, mtk_musb_match);
5270990366bSMin Guo #endif
5280990366bSMin Guo 
5290990366bSMin Guo static struct platform_driver mtk_musb_driver = {
5300990366bSMin Guo 	.probe = mtk_musb_probe,
531ace4e263SUwe Kleine-König 	.remove_new = mtk_musb_remove,
5320990366bSMin Guo 	.driver = {
5330990366bSMin Guo 		   .name = "musb-mtk",
5340990366bSMin Guo 		   .of_match_table = of_match_ptr(mtk_musb_match),
5350990366bSMin Guo 	},
5360990366bSMin Guo };
5370990366bSMin Guo 
5380990366bSMin Guo module_platform_driver(mtk_musb_driver);
5390990366bSMin Guo 
5400990366bSMin Guo MODULE_DESCRIPTION("MediaTek MUSB Glue Layer");
5410990366bSMin Guo MODULE_AUTHOR("Min Guo <min.guo@mediatek.com>");
5420990366bSMin Guo MODULE_LICENSE("GPL v2");
543