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/openbmc/u-boot/drivers/mmc/
H A Dsdhci.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
24 unsigned long timeout; in sdhci_reset() local
26 /* Wait max 100 ms */ in sdhci_reset()
27 timeout = 100; in sdhci_reset()
30 if (timeout == 0) { in sdhci_reset()
35 timeout--; in sdhci_reset()
43 if (cmd->resp_type & MMC_RSP_136) { in sdhci_cmd_done()
46 cmd->response[i] = sdhci_readl(host, in sdhci_cmd_done()
47 SDHCI_RESPONSE + (3-i)*4) << 8; in sdhci_cmd_done()
[all …]
H A Dtegra_mmc.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Portions Copyright 2011-2016 NVIDIA Corporation
16 #include <asm/arch-tegra/tegra_mmc.h>
37 u8 pwr = 0; in tegra_mmc_set_power() local
40 if (power != (unsigned short)-1) { in tegra_mmc_set_power()
43 pwr = TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V1_8; in tegra_mmc_set_power()
47 pwr = TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V3_0; in tegra_mmc_set_power()
51 pwr = TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V3_3; in tegra_mmc_set_power()
55 debug("%s: pwr = %X\n", __func__, pwr); in tegra_mmc_set_power()
58 writeb(pwr, &priv->reg->pwrcon); in tegra_mmc_set_power()
[all …]
/openbmc/linux/drivers/pmdomain/samsung/
H A Dexynos-pm-domains.c1 // SPDX-License-Identifier: GPL-2.0
9 // conjunction with runtime-pm. Support for both device-tree and non-device-tree
40 u32 timeout, pwr; in exynos_pd_power() local
44 base = pd->base; in exynos_pd_power()
46 pwr = power_on ? pd->local_pwr_cfg : 0; in exynos_pd_power()
47 writel_relaxed(pwr, base); in exynos_pd_power()
49 /* Wait max 1ms */ in exynos_pd_power()
50 timeout = 10; in exynos_pd_power()
52 while ((readl_relaxed(base + 0x4) & pd->local_pwr_cfg) != pwr) { in exynos_pd_power()
53 if (!timeout) { in exynos_pd_power()
[all …]
/openbmc/linux/drivers/regulator/
H A Dstm32-pwr.c1 // SPDX-License-Identifier: GPL-2.0
50 val = readl_relaxed(priv->base + REG_PWR_CR3); in stm32_pwr_reg_is_ready()
52 return (val & priv->ready_mask); in stm32_pwr_reg_is_ready()
60 val = readl_relaxed(priv->base + REG_PWR_CR3); in stm32_pwr_reg_is_enabled()
62 return (val & rdev->desc->enable_mask); in stm32_pwr_reg_is_enabled()
71 val = readl_relaxed(priv->base + REG_PWR_CR3); in stm32_pwr_reg_enable()
72 val |= rdev->desc->enable_mask; in stm32_pwr_reg_enable()
73 writel_relaxed(val, priv->base + REG_PWR_CR3); in stm32_pwr_reg_enable()
75 /* use an arbitrary timeout of 20ms */ in stm32_pwr_reg_enable()
79 dev_err(&rdev->dev, "regulator enable timed out!\n"); in stm32_pwr_reg_enable()
[all …]
/openbmc/linux/drivers/input/touchscreen/
H A Dbcm_iproc_tsc.c1 // SPDX-License-Identifier: GPL-2.0-only
22 #define IPROC_TS_NAME "iproc-ts"
88 regmap_read(priv->regmap, reg, &val); \
93 /* Each step is 1024 us. Valid 1-256 */
96 /* Each step is 512 us. Valid 0-255 */
100 * The settling duration (in ms) is the amount of time the tsc
102 * drivers in detection mode. Valid values: 0-11
103 * 0 = 0.008 ms
104 * 1 = 0.01 ms
105 * 2 = 0.02 ms
[all …]
/openbmc/linux/Documentation/devicetree/bindings/input/
H A Diqs626a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS626A is a 14-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
19 - $ref: touchscreen/touchscreen.yaml#
31 "#address-cells":
34 "#size-cells":
37 azoteq,suspend-mode:
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H A Diqs269a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS269A is an 8-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
28 "#address-cells":
31 "#size-cells":
34 azoteq,hall-enable:
37 Enables Hall-effect sensing on channels 6 and 7. In this case, keycodes
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/openbmc/u-boot/board/samsung/common/
H A Dmisc.c1 // SPDX-License-Identifier: GPL-2.0+
64 offset += snprintf(buf + offset, buf_size - offset, in set_dfu_alt_info()
106 snprintf(info, ARRAY_SIZE(info), "%s%x-%s%s.dtb", in set_board_info()
217 "env default -a; saveenv",
239 lcd_printf("\tDRAM size: %u MB\n", gd->ram_size / SZ_1M); in display_board_info()
243 if (!mmc->capacity) in display_board_info()
246 lcd_printf("\teMMC size: %llu MB\n", mmc->capacity / SZ_1M); in display_board_info()
251 vid->vl_col, vid->vl_row); in display_board_info()
253 lcd_printf("\tDisplay BPP: %u\n", 1 << vid->vl_bpix); in display_board_info()
314 /* Clear PWR button Rising edge interrupt status flag */ in mode_leave_menu()
[all …]
/openbmc/linux/drivers/mmc/host/
H A Dsdhci-xenon.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Date: 2016-8-24
22 #include "sdhci-pltfm.h"
23 #include "sdhci-xenon.h"
28 ktime_t timeout; in xenon_enable_internal_clk() local
33 /* Wait max 20 ms */ in xenon_enable_internal_clk()
34 timeout = ktime_add_ms(ktime_get(), 20); in xenon_enable_internal_clk()
36 bool timedout = ktime_after(ktime_get(), timeout); in xenon_enable_internal_clk()
42 dev_err(mmc_dev(host->mmc), "Internal clock never stabilised.\n"); in xenon_enable_internal_clk()
43 return -ETIMEDOUT; in xenon_enable_internal_clk()
[all …]
H A Dsdhci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
5 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
9 * - JMicron (hardware and technical support)
19 #include <linux/dma-mapping.h>
33 #include <linux/mmc/slot-gpio.h>
40 pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
43 pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
73 SDHCI_DUMP("Wake-up: 0x%08x | Clock: 0x%08x\n", in sdhci_dumpregs()
76 SDHCI_DUMP("Timeout: 0x%08x | Int stat: 0x%08x\n", in sdhci_dumpregs()
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H A Dmmci_stm32_sdmmc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
8 #include <linux/dma-mapping.h>
84 struct sdmmc_idma *idma = host->dma_priv; in sdmmc_idma_validate_data()
85 struct device *dev = mmc_dev(host->mmc); in sdmmc_idma_validate_data()
93 idma->use_bounce_buffer = false; in sdmmc_idma_validate_data()
94 for_each_sg(data->sg, sg, data->sg_len - 1, i) { in sdmmc_idma_validate_data()
95 if (!IS_ALIGNED(sg->offset, sizeof(u32)) || in sdmmc_idma_validate_data()
96 !IS_ALIGNED(sg->length, in sdmmc_idma_validate_data()
97 host->variant->stm32_idmabsize_align)) { in sdmmc_idma_validate_data()
[all …]
H A Dmmci.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/mmc/host/mmci.c - ARM PrimeCell MMCI PL180/1 driver
6 * Copyright (C) 2010 ST-Ericsson SA
26 #include <linux/mmc/slot-gpio.h>
33 #include <linux/dma-mapping.h>
47 #define DRIVER_NAME "mmci-pl18x"
373 spin_lock_irqsave(&host->lock, flags); in mmci_card_busy()
374 if (readl(host->base + MMCISTATUS) & host->variant->busy_detect_flag) in mmci_card_busy()
376 spin_unlock_irqrestore(&host->lock, flags); in mmci_card_busy()
390 if (host->cclk < 25000000) in mmci_reg_delay()
[all …]
H A Dsdhci.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
103 * VDD2 - UHS2 or PCIe/NVMe
174 #define SDHCI_INT_ALL_MASK ((unsigned int)-1)
196 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
243 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
252 /* 4C-4F reserved for more max current */
259 /* 55-57 reserved */
264 /* 60-FB reserved */
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H A Dsdhci-msm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/mmc/host/sdhci-msm.c - Qualcomm SDHCI Platform driver
5 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
23 #include "sdhci-cqhci.h"
24 #include "sdhci-pltfm.h"
123 #define INVALID_TUNING_PHASE -1
134 /* Timeout value to avoid infinite waiting for pwr_irq */
140 /* Max load for eMMC Vdd-io supply */
146 /* Max load for SD Vdd-io supply */
150 msm_host->var_ops->msm_readl_relaxed(host, offset)
[all …]
/openbmc/linux/drivers/pci/hotplug/
H A Dpciehp_hpc.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
8 * Copyright (C) 2003-2004 Intel Corporation
36 * assert presence detect--and those will still work, they will
50 return ctrl->pcie->port; in ctrl_dev()
59 int retval, irq = ctrl->pcie->irq; in pciehp_request_irq()
62 ctrl->poll_thread = kthread_run(&pciehp_poll, ctrl, in pciehp_request_irq()
63 "pciehp_poll-%s", in pciehp_request_irq()
65 return PTR_ERR_OR_ZERO(ctrl->poll_thread); in pciehp_request_irq()
80 kthread_stop(ctrl->poll_thread); in pciehp_free_irq()
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/openbmc/linux/drivers/net/wireless/ath/ath10k/
H A Dtargaddrs.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2016 Qualcomm Atheros, Inc.
36 * Pointer to application-defined area, if any.
50 * General-purpose flag bits, similar to SOC_OPTION_* flags.
103 u32 hi_num_bpatch_streams; /* 0x70 -- unused */
124 * 0xa8 - [1]: 0 = UART FC active low, 1 = UART FC active high
125 * [31:16]: wakeup timeout in ms
143 /* 0xbc - [31:0]: idle timeout in ms */
150 /* If non-zero, override values sent to Host in WMI_READY event. */
[all …]
/openbmc/linux/drivers/phy/ti/
H A Dphy-twl4030-usb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
5 * Copyright (C) 2004-2007 Texas Instruments
10 * - HS USB ULPI mode works.
11 * - 3-pin mode support may be added in future.
138 * cable is present and we need to be runtime-enabled
175 /*-------------------------------------------------------------------------*/
186 dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n", in twl4030_i2c_write_u8_verify()
194 dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n", in twl4030_i2c_write_u8_verify()
198 return -EBUSY; in twl4030_i2c_write_u8_verify()
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8916-longcheer-l8150.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8916-pm8916.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/leds/common.h>
13 compatible = "longcheer,l8150", "qcom,msm8916-v1-qrd/9-v1", "qcom,msm8916";
14 chassis-type = "handset";
23 stdout-path = "serial0";
[all …]
/openbmc/linux/net/bluetooth/
H A Dl2cap_sock.c2 BlueZ - Bluetooth protocol stack for Linux
3 Copyright (C) 2000-2001 Qualcomm Incorporated
4 Copyright (C) 2009-2010 Gustavo F. Padovan <gustavo@padovan.org>
53 return sock && sock->ops == &l2cap_sock_ops; in l2cap_is_socket()
61 return -EINVAL; in l2cap_validate_bredr_psm()
63 /* Restrict usage of well-known PSMs */ in l2cap_validate_bredr_psm()
65 return -EACCES; in l2cap_validate_bredr_psm()
74 return -EINVAL; in l2cap_validate_le_psm()
78 return -EACCES; in l2cap_validate_le_psm()
85 struct sock *sk = sock->sk; in l2cap_sock_bind()
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/openbmc/linux/drivers/net/wireless/ath/ath9k/
H A Dmci.c2 * Copyright (c) 2010-2011 Atheros Communications Inc.
17 #include <linux/dma-mapping.h>
31 if (list_empty(&mci->info)) in ath_mci_find_profile()
34 list_for_each_entry(entry, &mci->info, list) { in ath_mci_find_profile()
35 if (entry->conn_handle == info->conn_handle) in ath_mci_find_profile()
48 if ((mci->num_sco == ATH_MCI_MAX_SCO_PROFILE) && in ath_mci_add_profile()
49 (info->type == MCI_GPM_COEX_PROFILE_VOICE)) in ath_mci_add_profile()
52 if (((NUM_PROF(mci) - mci->num_sco) == ATH_MCI_MAX_ACL_PROFILE) && in ath_mci_add_profile()
53 (info->type != MCI_GPM_COEX_PROFILE_VOICE)) in ath_mci_add_profile()
62 list_add_tail(&entry->list, &mci->info); in ath_mci_add_profile()
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/openbmc/linux/drivers/net/ethernet/intel/e1000e/
H A Dich8lan.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
36 #define E1000_ICH_FWSM_PCIM2PCI 0x01000000 /* ME PCIm-to-PCI active */
93 /* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */
106 #define E1000_PCH2_RAR_ENTRIES 5 /* RAR[0], SHRA[0-3] */
107 #define E1000_PCH_LPT_RAR_ENTRIES 12 /* RAR[0], SHRA[0-10] */
144 /* Half-duplex collision counts */
172 #define I218_ULP_CONFIG1_IND 0x0004 /* Pwr up from ULP indication */
192 /* Strapping Option Register - RO */
203 #define HV_OEM_BITS_RESTART_AN 0x0400 /* Restart Auto-negotiation */
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/openbmc/linux/drivers/usb/typec/tcpm/
H A Dfusb302.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2016-2017 Google, Inc
5 * Fairchild FUSB302 Type-C Chip Driver
41 * longer than PD_T_PD_DEBPUNCE (10-20ms).
129 return chip->logbuffer_tail == in fusb302_log_full()
130 (chip->logbuffer_head + 1) % LOG_BUFFER_ENTRIES; in fusb302_log_full()
141 if (!chip->logbuffer[chip->logbuffer_head]) { in _fusb302_log()
142 chip->logbuffer[chip->logbuffer_head] = in _fusb302_log()
144 if (!chip->logbuffer[chip->logbuffer_head]) in _fusb302_log()
150 mutex_lock(&chip->logbuffer_lock); in _fusb302_log()
[all …]
/openbmc/linux/drivers/input/misc/
H A Diqs626a.c1 // SPDX-License-Identifier: GPL-2.0+
8 * inductive keys as well as Hall-effect switches, and one for a trackpad that
227 .name = "event-prox",
233 .name = "event-prox-alt",
240 .name = "event-touch",
246 .name = "event-touch-alt",
253 .name = "event-deep",
259 .name = "event-deep-alt",
367 .name = "ulp-0",
378 .name = "trackpad-3x2",
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dlogicpd-torpedo-baseboard.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 compatible = "gpio-keys";
6 pinctrl-names = "default";
7 pinctrl-0 = <&gpio_key_pins &gpio_key_pins_wkup>;
13 wakeup-source;
20 wakeup-source;
27 wakeup-source;
34 wakeup-source;
39 compatible = "ti,omap-twl4030";
45 compatible = "gpio-leds";
[all …]
/openbmc/linux/drivers/net/ieee802154/
H A Dadf7242.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Analog Devices ADF7242 Low-Power IEEE 802.15.4 Transceiver
5 * Copyright 2009-2017 Analog Devices Inc.
48 #define REG_CH_FREQ0 0x300 /* RW Channel Frequency Settings - Low */
49 #define REG_CH_FREQ1 0x301 /* RW Channel Frequency Settings - Middle */
50 #define REG_CH_FREQ2 0x302 /* RW Channel Frequency Settings - High */
62 #define REG_TMR_CFG0 0x316 /* RW Wake up Timer Conf Register - High */
63 #define REG_TMR_CFG1 0x317 /* RW Wake up Timer Conf Register - Low */
64 #define REG_TMR_RLD0 0x318 /* RW Wake up Timer Value Register - High */
65 #define REG_TMR_RLD1 0x319 /* RW Wake up Timer Value Register - Low */
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