Home
last modified time | relevance | path

Searched full:tbg (Results 1 – 21 of 21) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dmarvell,armada-3700-uart-clock.yaml23 "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal"
26 It is suggest to specify at least one TBG clock to achieve
32 - const: TBG-A-P
33 - const: TBG-B-P
34 - const: TBG-A-S
35 - const: TBG-B-S
56 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>, <&xtalclk>;
57 clock-names = "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal";
H A Darmada3700-tbg-clock.txt6 The TBG clock consumer should specify the desired clock by having the
10 0 = TBG A P
11 1 = TBG B P
12 2 = TBG A S
13 3 = TBG B S
16 - compatible : shall be "marvell,armada-3700-tbg-clock"
22 tbg: tbg@13200 {
23 compatible = "marvell,armada-3700-tbg-clock";
H A Darmada3700-periph-clock.txt60 TBG-A P, TBG-B P, TBG-A S, TBG-B S and finally the xtal clock.
68 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
69 <&tbg 3>, <&xtalclk>;
/openbmc/linux/drivers/clk/mvebu/
H A Darmada-37xx-tbg.c47 static const struct tbg_def tbg[NUM_TBG] = { variable
48 {"TBG-A-P", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL8, TBG_A_VCODIV_DIFF},
49 {"TBG-B-P", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL8, TBG_B_VCODIV_DIFF},
50 {"TBG-A-S", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL1, TBG_A_VCODIV_SE},
51 {"TBG-B-S", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL1, TBG_B_VCODIV_SE},
115 name = tbg[i].name; in armada_3700_tbg_clock_probe()
116 mult = tbg_get_mult(reg, &tbg[i]); in armada_3700_tbg_clock_probe()
117 div = tbg_get_div(reg, &tbg[i]); in armada_3700_tbg_clock_probe()
121 dev_err(dev, "Can't register TBG clock %s\n", name); in armada_3700_tbg_clock_probe()
138 { .compatible = "marvell,armada-3700-tbg-clock", },
[all …]
H A Darmada-37xx-periph.c11 * TBG-A-P --| | | | | | ______
12 * TBG-B-P --| Mux |--| /div1 |--| /div2 |--| Gate |--> perip_clk
13 * TBG-A-S --| | | | | | |______|
14 * TBG-B-S --|_____| |_______| |_______|
201 .parent_names = (const char *[]){ "TBG-A-P", \
202 "TBG-B-P", "TBG-A-S", "TBG-B-S"}, \
211 .parent_names = (const char *[]){ "TBG-A-P", \
212 "TBG-B-P", "TBG-A-S", "TBG-B-S"}, \
237 .parent_names = (const char *[]){ "TBG-A-P", \
238 "TBG-B-P", "TBG-A-S", "TBG-B-S"}, \
[all …]
H A DMakefile12 obj-$(CONFIG_ARMADA_37XX_CLK) += armada-37xx-tbg.o
/openbmc/u-boot/drivers/clk/mvebu/
H A Darmada-37xx-tbg.c47 static const struct tbg_def tbg[NUM_TBG] = { variable
48 {"TBG-A-P", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL8, TBG_A_VCODIV_DIFF},
49 {"TBG-B-P", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL8, TBG_B_VCODIV_DIFF},
50 {"TBG-A-S", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL1, TBG_A_VCODIV_SE},
51 {"TBG-B-S", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL1, TBG_B_VCODIV_SE},
103 printf(" %s at %lu Hz\n", tbg[i].name, in armada_37xx_tbg_clk_dump()
129 mult = tbg_get_mult(reg, &tbg[i]); in armada_37xx_tbg_clk_probe()
130 div = tbg_get_div(reg, &tbg[i]); in armada_37xx_tbg_clk_probe()
143 { .compatible = "marvell,armada-3700-tbg-clock" },
H A Darmada-37xx-periph.c40 { "TBG-A-P", TBG_A_P },
41 { "TBG-B-P", TBG_B_P },
42 { "TBG-A-S", TBG_A_S },
43 { "TBG-B-S", TBG_B_S },
200 CLK_GATE_DIV(ddr_phy, 19, DIV_SEL0, 18, 1, div_table2, "TBG-A-S"),
250 /* parent is one of TBG clocks */ in get_parent_rate()
251 int tbg = get_mux(priv, clk->mux_shift); in get_parent_rate() local
253 res = priv->parents[tbg]; in get_parent_rate()
441 /* We also check if parent is our TBG clock */ in armada_37xx_periph_clk_set_parent()
504 if (clk_dump("tbg@13200", armada_37xx_tbg_clk_dump)) in soc_clk_dump()
H A DMakefile1 obj-$(CONFIG_CLK_ARMADA_3720) += armada-37xx-periph.o armada-37xx-tbg.o
/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-37xx.dtsi143 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
144 <&tbg 3>, <&xtalclk>;
145 clock-names = "TBG-A-P", "TBG-B-P", "TBG-A-S",
146 "TBG-B-S", "xtal";
177 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
178 <&tbg 3>, <&xtalclk>;
185 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
186 <&tbg 3>, <&xtalclk>;
190 tbg: tbg@13200 { label
191 compatible = "marvell,armada-3700-tbg-clock";
H A Darmada-3720-turris-mox.dts215 assigned-clock-parents = <&tbg 1>;
/openbmc/u-boot/arch/arm/dts/
H A Darmada-37xx.dtsi119 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>;
126 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>;
130 tbg: tbg@13200 { label
131 compatible = "marvell,armada-3700-tbg-clock";
H A Darmada-3720-turris-mox.dts112 assigned-clock-parents = <&tbg 1>;
/openbmc/linux/arch/x86/kernel/
H A Dtboot.c261 #define TB_COPY_GAS(tbg, g) \ in tboot_copy_fadt() argument
262 tbg.space_id = g.space_id; \ in tboot_copy_fadt()
263 tbg.bit_width = g.bit_width; \ in tboot_copy_fadt()
264 tbg.bit_offset = g.bit_offset; \ in tboot_copy_fadt()
265 tbg.access_width = g.access_width; \ in tboot_copy_fadt()
266 tbg.address = g.address; in tboot_copy_fadt()
/openbmc/linux/drivers/tty/serial/
H A Dmvebu-uart.c466 * > d1 * d2 ("TBG divisors"): can divide only TBG clock from 1 to 6 in mvebu_uart_baud_rate_set()
474 * baudrate = tbg / (d1 * d2 * d * 16) in mvebu_uart_baud_rate_set()
478 * baudrate = 10 * tbg / (d1*d2 * d * (3 * (m1 + m2) + 2 * (m3 + m4))) in mvebu_uart_baud_rate_set()
496 * Member port->uartclk is either xtal clock rate or TBG clock rate in mvebu_uart_baud_rate_set()
1134 /* Do not use XTAL, select TBG clock and TBG d1 * d2 divisors */ in mvebu_uart_clock_prepare()
1143 /* Use XTAL, TBG bits are then ignored */ in mvebu_uart_clock_prepare()
1324 static const char *const parent_clk_names[] = { "TBG-A-P", "TBG-B-P", in mvebu_uart_clock_probe()
1325 "TBG-A-S", "TBG-B-S", in mvebu_uart_clock_probe()
1421 * Calculate the smallest TBG d1 and d2 divisors that in mvebu_uart_clock_probe()
1450 * Choose TBG clock source with the smallest divisors. Use XTAL in mvebu_uart_clock_probe()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dmvebu-uart.txt19 of UART. TBG clock (with UART TBG divisors d1=d2=1) or xtal clock
/openbmc/linux/drivers/cpufreq/
H A Darmada-37xx-cpufreq.c138 /* Determine to which TBG clock is CPU connected */ in armada37xx_cpufreq_dvfs_setup()
155 /* Set cpu clock source, for all the level we use TBG */ in armada37xx_cpufreq_dvfs_setup()
160 /* Set TBG index, for all levels we use the same TBG */ in armada37xx_cpufreq_dvfs_setup()
/openbmc/linux/drivers/ata/
H A Dsata_promise.c46 PDC_TBG_MODE = 0x41C, /* TBG mode (not SATAII) */
1128 /* don't initialise TBG or SLEW on 2nd generation chips */ in pdc_host_init()
1132 /* reduce TBG clock to 133 Mhz. */ in pdc_host_init()
/openbmc/linux/
H A Dopengrok0.0.log[all...]
H A Dopengrok1.0.log[all...]
H A Dopengrok2.0.log[all...]