| /openbmc/u-boot/arch/arm/mach-omap2/omap4/ |
| H A D | emif.c | 36 .tCKE = 3,
60 .tCKE = 3,
87 .tCKE = 3,
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| H A D | sdram_elpida.c | 203 .tCKE = 3,
226 .tCKE = 3,
249 .tCKE = 3,
269 .tCKE = 3,
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| /openbmc/linux/drivers/memory/ |
| H A D | of_memory.c | 46 ret |= of_property_read_u32(np, "tCKE-min-tck", &min->tCKE); in of_get_min_tck()
193 ret |= of_property_read_u32(np, "tCKE-min-tck", &min->tCKE); in of_lpddr3_get_min_tck()
236 ret |= of_property_read_u32(np, "tCKE", &tim->tCKE); in of_lpddr3_do_get_timings()
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| H A D | jedec_ddr.h | 182 u32 tCKE; member
246 u32 tCKE; member
275 u32 tCKE; member
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| H A D | jedec_ddr_data.c | 129 .tCKE = 3,
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| /openbmc/u-boot/arch/arm/mach-omap2/omap5/ |
| H A D | emif.c | 37 .tCKE = 3,
64 .tCKE = 3,
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| /openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ddr/ |
| H A D | jedec,lpddr3.yaml | 41 tCKE-min-tck:
198 tCKE-min-tck = <2>;
224 tCKE = <3750>;
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| H A D | jedec,lpddr3-timings.yaml | 33 tCKE:
138 tCKE = <3750>;
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| H A D | jedec,lpddr2.yaml | 77 tCKE-min-tck:
159 tCKE-min-tck = <3>;
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| /openbmc/u-boot/arch/arm/mach-sunxi/dram_timings/ |
| H A D | ddr2_v3s.c | 27 u8 tcke = 3; in mctl_set_timing_params() local
67 DRAMTMG5_TCKESR(tckesr) | DRAMTMG5_TCKE(tcke), in mctl_set_timing_params()
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| H A D | lpddr3_stock.c | 27 u8 tcke = 3; in mctl_set_timing_params() local
66 DRAMTMG5_TCKESR(tckesr) | DRAMTMG5_TCKE(tcke), in mctl_set_timing_params()
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| H A D | ddr3_1333.c | 27 u8 tcke = 3; in mctl_set_timing_params() local
70 DRAMTMG5_TCKESR(tckesr) | DRAMTMG5_TCKE(tcke), in mctl_set_timing_params()
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| /openbmc/u-boot/arch/arm/include/asm/arch-rockchip/ |
| H A D | sdram_rk3036.h | 68 u32 tcke; member
265 u32 tcke; member
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| H A D | sdram.h | 71 u32 tcke; member
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| H A D | ddr_rk3368.h | 72 u32 tcke; member
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| H A D | sdram_rk322x.h | 104 u32 tcke; member
230 u32 tcke; member
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| /openbmc/u-boot/arch/arm/mach-sunxi/ |
| H A D | dram_sun9i.c | 151 struct dram_sun9i_timing tCKE; member
409 const u32 tCKE = MAX(para->tCKE.ck, PS2CYCLES_ROUNDUP(para->tCKE.ps)); in mctl_channel_init() local
413 * needs to be calculated based on the nCK value of tCKE) in mctl_channel_init()
419 const u32 tCKESR = tCKE + 1; in mctl_channel_init()
552 (MCTL_DIV2(tCKESR) << 8) | (MCTL_DIV2(tCKE) << 0), in mctl_channel_init()
648 (tCKE << 15) | (tDLLK << 19) | in mctl_channel_init()
920 .tCKE = { .ck = 3, .ps = 5000 }, in sunxi_dram_init()
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| H A D | dram_sun8i_a33.c | 111 u8 tcke = 3; in auto_set_timing_para() local
148 reg_val = (tcksrx << 24) | (tcksre << 16) | (tckesr << 8) | (tcke << 0); in auto_set_timing_para()
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| /openbmc/u-boot/arch/arm/include/asm/arch-vf610/ |
| H A D | ddrmc-vf610.h | 32 u8 tcke; member
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| /openbmc/u-boot/arch/arm/mach-imx/mx6/ |
| H A D | ddr.c | 998 u8 tcke, tcksrx, tcksre, trrd; in mx6_lpddr2_cfg() local
1042 tcke = 3; in mx6_lpddr2_cfg()
1080 debug("tcke=%d\n", tcke); in mx6_lpddr2_cfg()
1199 mmdc0->mdpdc = (tcke & 0x7) << 16 | in mx6_lpddr2_cfg()
1228 u8 tcke, tcksrx, tcksre, txpdll, taofpd, taonpd, trrd; in mx6_ddr3_cfg() local
1302 tcke = DIV_ROUND_UP(max(3 * clkper, 7500), clkper) - 1; in mx6_ddr3_cfg()
1313 tcke = DIV_ROUND_UP(max(3 * clkper, 5625), clkper) - 1; in mx6_ddr3_cfg()
1347 debug("tcke=%d\n", tcke); in mx6_ddr3_cfg()
1500 mmdc0->mdpdc = (tcke & 0x7) << 16 | in mx6_ddr3_cfg()
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| /openbmc/linux/arch/arm/boot/dts/ti/omap/ |
| H A D | elpida_ecb240abacn.dtsi | 20 tCKE-min-tck = <3>;
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| /openbmc/u-boot/board/olimex/mx23_olinuxino/ |
| H A D | spl_boot.c | 105 /* tCKE = 1*tCK */ in mxs_adjust_memory_params()
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| /openbmc/u-boot/arch/arm/include/asm/arch-tegra20/ |
| H A D | emc.h | 50 u32 tcke; /* 0x94: EMC_TCKE */ member
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| /openbmc/u-boot/board/tbs/tbs2910/ |
| H A D | tbs2910.cfg | 109 /* tCKE=2+1,tCKSRX=6,tCKSE=6, active power down after 256 cycles (setting 5) */
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| /openbmc/u-boot/arch/arm/include/asm/arch-omap3/ |
| H A D | mem.h | 82 #define ACTIM_CTRLB(twtr, tcke, txp, txsr) \ argument
84 ACTIM_CTRLB_TCKE(tcke) | \
|