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/openbmc/linux/Documentation/riscv/
H A Dvm-layout.rst66 RISC-V Linux Kernel SV48
142 userspace from a 48-bit range (sv48). This default behavior is achieved by
144 smaller than sv48, the CPU maximum supported address space will be the default.
154 :code:`1 << 47` must be provided. Note that this is 47 due to sv48 userspace
/openbmc/linux/Documentation/devicetree/bindings/riscv/
H A Dcpus.yaml72 - riscv,sv48
201 mmu-type = "riscv,sv48";
/openbmc/qemu/target/riscv/
H A Dcpu-param.h14 # define TARGET_VIRT_ADDR_SPACE_BITS 48 /* sv48 */
H A Dcpu.c354 if (!strncmp(satp_mode_str, "sv48", 4)) { in satp_mode_from_str()
402 return "sv48"; in satp_mode_str()
1242 object_property_add(obj, "sv48", "bool", cpu_riscv_get_satp, in riscv_add_satp_mode_properties()
/openbmc/qemu/linux-user/riscv/
H A Dtarget_proc.h19 mmu = (cpu_env->xl == MXL_RV32) ? "sv32" : "sv48"; in open_cpuinfo()
/openbmc/linux/tools/testing/selftests/riscv/mm/
H A Dmmap_test.h27 * sv39, sv48, sv57 in do_mmaps()
/openbmc/linux/Documentation/devicetree/bindings/cpu/
H A Didle-states.yaml721 mmu-type = "riscv,sv48";
737 mmu-type = "riscv,sv48";
753 mmu-type = "riscv,sv48";
769 mmu-type = "riscv,sv48";
/openbmc/linux/arch/riscv/mm/
H A Dkasan_init.c15 * Kasan shadow region must lie at a fixed address across sv39, sv48 and sv57
21 * For sv48 and sv57, the region start is aligned on PGDIR_SIZE whereas the end
H A Dinit.c797 * meaning sv48 is supported.
/openbmc/linux/Documentation/translations/zh_CN/riscv/
H A Dvm-layout.rst71 RISC-V Linux Kernel SV48
/openbmc/linux/arch/riscv/include/asm/
H A Dpage.h37 * define the PAGE_OFFSET value for SV48 and SV39.
H A Dpgtable.h858 * - 0x800000000000 ( 128TB) for RV64 using SV48 mmu
/openbmc/linux/arch/riscv/kernel/
H A Dcpu.c272 sv_type = "sv48"; in print_mmu()
/openbmc/qemu/hw/riscv/
H A Dspike.c114 qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv48"); in create_fdt()
H A Dvirt-acpi-build.c349 build_append_int_noprefix(table_data, 1, 1); /* Sv48 */ in build_rhct()
H A Dsifive_u.c179 qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv48"); in create_fdt()
/openbmc/linux/tools/testing/selftests/kvm/lib/riscv/
H A Dprocessor.c189 * The RISC-V Sv48 MMU mode supports 56-bit physical address in riscv_vcpu_mmu_setup()