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Searched +full:spi +full:- +full:cs +full:- +full:setup +full:- +full:ns (Results 1 – 25 of 38) sorted by relevance

12

/openbmc/linux/drivers/spi/
H A Dspi-bitbang.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * polling/bitbanging SPI master controller driver utilities
15 #include <linux/spi/spi.h>
16 #include <linux/spi/spi_bitbang.h>
21 /*----------------------------------------------------------------------*/
24 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
25 * Use this for GPIO or shift-register level hardware APIs.
27 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
28 * to glue code. These bitbang setup() and cleanup() routines are always
29 * used, though maybe they're called from controller-aware code.
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H A Dspi-dw-core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Designware SPI core controller driver (refer pxa2xx_spi.c)
9 #include <linux/dma-mapping.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/spi-mem.h>
21 #include "spi-dw.h"
64 snprintf(name, 32, "dw_spi%d", dws->host->bus_num); in dw_spi_debugfs_init()
65 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()
67 dws->regset.regs = dw_spi_dbgfs_regs; in dw_spi_debugfs_init()
68 dws->regset.nregs = ARRAY_SIZE(dw_spi_dbgfs_regs); in dw_spi_debugfs_init()
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H A Dspi-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Addy Ke <addy.ke@rock-chips.com>
14 #include <linux/spi/spi.h>
18 #define DRIVER_NAME "rockchip-spi"
25 /* SPI register offsets */
154 /* sclk_out: spi host internal logic in rk3x can support 50Mhz */
158 * SPI_CTRLR1 is 16-bits, so we should support lengths of 0xffff + 1. However,
163 /* 2 for native cs, 2 for cs-gpio */
198 bool cs_inactive; /* spi target tansmition stop when cs inactive */
199 bool cs_high_supported; /* native CS supports active-high polarity */
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H A Dspi-cadence-quadspi.c1 // SPDX-License-Identifier: GPL-2.0-only
5 // Copyright Altera Corporation (C) 2012-2014. All rights reserved.
6 // Copyright Intel Corporation (C) 2019-2020. All rights reserved.
7 // Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
12 #include <linux/dma-mapping.h>
16 #include <linux/firmware/xlnx-zynqmp.h>
29 #include <linux/spi/spi.h>
30 #include <linux/spi/spi-mem.h>
33 #define CQSPI_NAME "cadence-qspi"
65 u8 cs; member
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H A Dspi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 // SPI init/core code
9 #include <linux/clk/clk-conf.h>
13 #include <linux/dma-mapping.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/spi-mem.h>
39 #include <trace/events/spi.h>
49 struct spi_device *spi = to_spi_device(dev); in spidev_release() local
51 spi_controller_put(spi->controller); in spidev_release()
52 kfree(spi->driver_override); in spidev_release()
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H A Dspi-fsl-dspi.c1 // SPDX-License-Identifier: GPL-2.0+
4 // Copyright 2020-2025 NXP
12 #include <linux/dma-mapping.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/spi-fsl-dspi.h>
23 #define DRIVER_NAME "fsl-dspi"
107 #define SPI_FRAME_BITS(bits) SPI_CTAR_FMSZ((bits) - 1)
108 #define SPI_FRAME_EBITS(bits) SPI_CTARE_FMSZE(((bits) - 1) >> 4)
147 /* Has A-011218 DMA erratum */
153 /* Has A-011218 DMA erratum */
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H A Dspi-loopback-test.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/spi/spi-loopback-test.c
21 #include <linux/spi/spi.h>
23 #include "spi-test.h"
28 MODULE_PARM_DESC(simulate_only, "if not 0 do not execute the spi message");
30 /* dump spi messages */
37 /* the device is jumpered for loopback - enabling some rx_buf tests */
54 "if set Chip Select (CS) will not be used");
57 static int run_only_iter_len = -1;
63 static int run_only_test = -1;
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/openbmc/u-boot/arch/arm/dts/
H A Dkeystone-k2l-evm.dts10 /dts-v1/;
13 #include "keystone-k2l.dtsi"
16 compatible = "ti,k2l-evm","ti,keystone";
22 #clock-cells = <0>;
23 compatible = "fixed-clock";
24 clock-frequency = <122880000>;
25 clock-output-names = "refclk-sys";
48 #address-cells = <2>;
49 #size-cells = <1>;
50 clock-ranges;
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H A Dkeystone-k2e-evm.dts2 * Copyright 2013-2014 Texas Instruments, Inc.
10 /dts-v1/;
13 #include "keystone-k2e.dtsi"
16 compatible = "ti,k2e-evm","ti,keystone";
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <100000000>;
26 clock-output-names = "refclk-sys";
30 #clock-cells = <0>;
31 compatible = "fixed-clock";
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H A Dkeystone-k2hk-evm.dts2 * Copyright 2013-2014 Texas Instruments, Inc.
10 /dts-v1/;
13 #include "keystone-k2hk.dtsi"
16 compatible = "ti,k2hk-evm","ti,keystone";
22 #clock-cells = <0>;
23 compatible = "fixed-clock";
24 clock-frequency = <122880000>;
25 clock-output-names = "refclk-sys";
29 #clock-cells = <0>;
30 compatible = "fixed-clock";
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/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dspi-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
10 Many SPI controllers need to add properties to peripheral devices. They could
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
13 need to be defined in the peripheral node because they are per-peripheral and
19 - Mark Brown <broonie@kernel.org>
27 - minimum: 0
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/openbmc/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2l-evm.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
10 #include "keystone-k2l.dtsi"
13 compatible = "ti,k2l-evm", "ti,k2l", "ti,keystone";
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
21 dsp_common_memory: dsp-common-memory@81f800000 {
22 compatible = "shared-dma-pool";
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H A Dkeystone-k2e-evm.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
10 #include "keystone-k2e.dtsi"
13 compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone";
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
21 dsp_common_memory: dsp-common-memory@81f800000 {
22 compatible = "shared-dma-pool";
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H A Dkeystone-k2hk-evm.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
10 #include "keystone-k2hk.dtsi"
13 compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone";
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
21 dsp_common_memory: dsp-common-memory@81f800000 {
22 compatible = "shared-dma-pool";
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/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp15xx-dhcom-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
6 #include "stm32mp15-pinctrl.dtsi"
7 #include "stm32mp15xxaa-pinctrl.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/mfd/st,stpmic1.h>
23 stdout-path = "serial0:115200n8";
31 reserved-memory {
32 #address-cells = <1>;
33 #size-cells = <1>;
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H A Dstm32mp15xx-dhcor-drc-compact.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
21 stdout-path = "serial0:115200n8";
25 compatible = "gpio-leds";
29 default-state = "off";
35 default-state = "off";
40 compatible = "regulator-fixed";
41 regulator-name = "vio";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
45 regulator-always-on;
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/openbmc/u-boot/board/siemens/corvus/
H A Dboard.c1 // SPDX-License-Identifier: GPL-2.0+
7 * U-Boot file: board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
8 * (C) Copyright 2007-2008
30 #include <spi.h>
63 csa = readl(&matrix->ebicsa); in corvus_nand_hw_init()
65 writel(csa, &matrix->ebicsa); in corvus_nand_hw_init()
70 &smc->cs[3].setup); in corvus_nand_hw_init()
73 &smc->cs[3].pulse); in corvus_nand_hw_init()
75 &smc->cs[3].cycle); in corvus_nand_hw_init()
84 &smc->cs[3].mode); in corvus_nand_hw_init()
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/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dsama5d3xcm.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3xcm.dtsi - Device Tree Include file for SAMA5D3x CPU Module
14 stdout-path = "serial0:115200n8";
23 clock-frequency = <32768>;
27 clock-frequency = <12000000>;
33 spi0: spi@f0004000 {
34 cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
39 compatible = "atmel,tcb-timer";
44 compatible = "atmel,tcb-timer";
51 pinctrl-0 = <&pinctrl_ebi_addr &pinctrl_ebi_cs0>;
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H A Dat91-sama5d27_som1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
10 #include "sama5d2-pinfunc.h"
11 #include <dt-bindings/gpio/gpio.h>
15 compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
23 clock-frequency = <32768>;
27 clock-frequency = <24000000>;
32 sdmmc0: sdio-host@a0000000 {
33 microchip,sdcal-inverted;
37 qspi1: spi@f0024000 {
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H A Dat91-sama5d2_icp.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d2_icp.dts - Device Tree file for SAMA5D2-ICP board
11 /dts-v1/;
13 #include "sama5d2-pinfunc.h"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
19 model = "Microchip SAMA5D2-ICP";
20 compatible = "microchip,sama5d2-icp", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
32 stdout-path = "serial0:115200n8";
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H A Dat91-sam9x60ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sam9x60ek.dts - Device Tree file for Microchip SAM9X60-EK board
9 /dts-v1/;
11 #include <dt-bindings/input/input.h>
14 model = "Microchip SAM9X60-EK";
24 stdout-path = "serial0:115200n8";
29 clock-frequency = <32768>;
33 clock-frequency = <24000000>;
37 gpio-keys {
38 compatible = "gpio-keys";
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H A Dat91-sama5d27_wlsom1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1
11 #include "sama5d2-pinfunc.h"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/mfd/atmel-flexcom.h>
14 #include <dt-bindings/pinctrl/at91.h>
18 compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
26 clock-frequency = <32768>;
30 clock-frequency = <24000000>;
35 compatible = "mmc-pwrseq-wilc1000";
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/openbmc/u-boot/board/freescale/mpc8349emds/
H A Dmpc8349emds.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <spi.h>
48 #define ns2clk(ns) (ns / (1000000000 / CONFIG_8349_CLKIN) + 1) argument
55 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) in dram_init()
56 return -ENXIO; in dram_init()
58 /* DDR SDRAM - Main SODIMM */ in dram_init()
59 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
77 /* set total bus SDRAM size(bytes) -- DDR */ in dram_init()
78 gd->ram_size = msize; in dram_init()
85 * fixed sdram init -- doesn't use serial presence detect.
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/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-gta04.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on omap3-beagle-xm.dts
7 /dts-v1/;
10 #include <dt-bindings/input/input.h>
17 cpu0-supply = <&vcc>;
27 stdout-path = &uart3;
33 /delete-property/ mmc2;
34 /delete-property/ mmc3;
38 compatible = "regulator-fixed";
39 regulator-name = "ldo_3v3";
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/openbmc/u-boot/doc/
H A DREADME.sifive-fu5401 FU540-C000 RISC-V SoC
3 The FU540-C000 is the world’s first 4+1 64-bit RISC‑V SoC from SiFive.
5 The HiFive Unleashed development platform is based on FU540-C000 and capable
16 1. SPI driver is still missing. So MMC card can't be used in U-Boot as of now.
17 2. U-Boot expects the serial console device entry to be present under /chosen
20 stdout-path = "/soc/serial@10010000:115200";
23 Without a serial console U-Boot will panic.
27 1. Add the RISC-V toolchain to your PATH.
28 2. Setup ARCH & cross compilation enviornment variable.
36 The current U-Boot port is supported in S-mode only and loaded from DRAM.
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