| /openbmc/linux/drivers/pinctrl/intel/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
8 select PINCTRL_INTEL
11 platforms. Supports 3 banks with 102, 28 and 44 gpios.
19 select PINCTRL_INTEL
22 allows configuring of SoC pins and using them as GPIOs.
26 select PINCTRL_INTEL
30 using them as GPIOs.
34 select PINMUX
35 select PINCONF
36 select GENERIC_PINCONF
[all …]
|
| H A D | Kconfig.tng | 1 # SPDX-License-Identifier: GPL-2.0-only
8 select PINMUX
9 select PINCONF
10 select GENERIC_PINCONF
15 If built as a module its name will be pinctrl-tangier.
19 select PINCTRL_TANGIER
21 Intel Merrifield Family-Level Interface Shim (FLIS) driver provides
23 GPIOs.
27 select PINCTRL_TANGIER
29 Intel Moorefield Family-Level Interface Shim (FLIS) driver provides
[all …]
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| /openbmc/linux/drivers/gpio/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
18 int "Maximum number of GPIOs for fast path"
39 select IRQ_DOMAIN
46 from PowerPC. Existing drivers using this interface need to select
47 this symbol, but new drivers should use the generic gpio-regmap
55 These checks help ensure that GPIOs have been properly initialized
57 non-sleeping contexts. They can make bitbanged serial protocols
64 select GPIO_CDEV # We need to encourage the new ABI
66 Say Y here to add the legacy sysfs interface for GPIOs.
78 for GPIOs. The character device allows userspace to control GPIOs
[all …]
|
| /openbmc/u-boot/arch/arm/mach-rockchip/rk3288/ |
| H A D | Kconfig | 4 bool "Google/Rockchip Veyron-Jerry Chromebook"
5 select BOARD_LATE_INIT
7 Jerry is a RK3288-based clamshell device with 2 USB 3.0 ports,
8 HDMI, an 11.9 inch EDP display, micro-SD card, touchpad and
9 WiFi. It includes a Chrome OS EC (Cortex-M3) to provide access to
13 bool "Google/Rockchip Veyron-Mickey Chromebit"
14 select BOARD_LATE_INIT
16 Mickey is a small RK3288-based device with one USB 3.0 port, HDMI
23 bool "Google/Rockchip Veyron-Minnie Chromebook"
24 select BOARD_LATE_INIT
[all …]
|
| /openbmc/u-boot/doc/device-tree-bindings/spi/ |
| H A D | spi-bus.txt | 10 - #address-cells - number of cells required to define a chip select
12 - #size-cells - should be zero.
13 - compatible - name of SPI bus controller following generic names
15 - cs-gpios - (optional) gpios chip select.
19 assigning chip select numbers. Since SPI chip select configuration is
20 flexible and non-standardized, it is left out of this binding with the
23 support describing the chip select layout.
26 - num-cs : total number of chipselects
28 If cs-gpios is used the number of chip select will automatically increased
29 with max(cs-gpios > hw cs)
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/usb/ |
| H A D | gpio-sbu-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/usb/gpio-sbu-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based SBU mux
10 - Bjorn Andersson <andersson@kernel.org>
13 In USB Type-C applications the SBU lines needs to be connected, disconnected
21 - enum:
22 - onnn,fsusb43l10x
23 - pericom,pi3usb102
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/spi/ |
| H A D | fsl-spi.txt | 4 - cell-index : QE SPI subblock index.
7 - compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl".
8 - mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
9 - reg : Offset and length of the register set for the device
10 - interrupts : <a b> where a is the interrupt number and b is a
15 - clock-frequency : input clock frequency to non FSL_SOC cores
18 - cs-gpios : specifies the gpio pins to be used for chipselects.
19 The gpios will be referred to as reg = <index> in the SPI child nodes.
20 If unspecified, a single SPI device without a chip select can be used.
21 - fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/sound/ |
| H A D | asahi-kasei,ak4458.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/sound/asahi-kasei,ak4458.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
15 - asahi-kasei,ak4458
16 - asahi-kasei,ak4497
21 avdd-supply:
24 dvdd-supply:
27 reset-gpios:
[all …]
|
| H A D | simple-audio-mux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/simple-audio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <aleandre.belloni@bootlin.com>
13 Simple audio multiplexers are driven using gpios, allowing to select which of
17 - $ref: dai-common.yaml#
21 const: simple-audio-mux
23 mux-gpios:
25 GPIOs used to select the input line.
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | gpio-mux-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/gpio-mux-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sergej Sawazki <ce3a@gmx.de>
14 const: gpio-mux-clock
18 - description: First parent clock
19 - description: Second parent clock
21 '#clock-cells':
24 select-gpios:
[all …]
|
| /openbmc/u-boot/drivers/gpio/ |
| H A D | Kconfig | 14 particular GPIOs that they provide. The uclass interface
15 is defined in include/asm-generic/gpio.h.
24 is a mechanism providing automatic GPIO request and config-
25 uration as part of the gpio-controller's driver probe function.
34 is a mechanism providing automatic GPIO request and config-
35 uration as part of the gpio-controller's driver probe function.
41 Select this to enable PIO for Altera devices. Please find
62 Say yes here to select AT91 PIO GPIO driver. AT91 PIO
64 lines. Each I/O line may be dedicated as a general-purpose
68 responsible for the general-purpose I/O.
[all …]
|
| /openbmc/openbmc/meta-ampere/meta-jade/recipes-ampere/platform/ampere-platform-init/ |
| H A D | mtjade_platform_gpios_init.sh | 3 function pre-platform-init() {
8 function post-platform-init() {
13 # add device enable, mux setting, device select gpios
14 "ext-hightemp-n"
15 "vr-pmbus-sel-n"
16 "i2c6-reset-n"
17 "i2c-backup-sel"
18 "power-chassis-control"
19 "host0-shd-req-n"
20 "host0-sysreset-n"
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | sff,sfp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP)
11 - Russell King <linux@armlinux.org.uk>
16 - sff,sfp # for SFP modules
17 - sff,sff # for soldered down SFF modules
19 i2c-bus:
24 maximum-power-milliwatt:
29 allowable by a module in the slot, in milli-Watts. Presently, modules can
[all …]
|
| /openbmc/linux/arch/arm/boot/dts/marvell/ |
| H A D | armada-xp-lenovo-ix4-300d.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for Lenovo Iomega ix4-300d
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include "armada-xp-mv78230.dtsi"
15 model = "Lenovo Iomega ix4-300d";
16 compatible = "lenovo,ix4-300d", "marvell,armadaxp-mv78230",
17 "marvell,armadaxp", "marvell,armada-370-xp";
20 stdout-path = "serial0:115200n8";
[all …]
|
| H A D | kirkwood-openrd.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
12 #include "kirkwood-6281.dtsi"
22 stdout-path = &uart0;
26 pinctrl: pin-controller@10000 {
27 pinctrl-0 = <&pmx_select28 &pmx_sdio_cd &pmx_select34>;
28 pinctrl-names = "default";
30 pmx_select28: pmx-select-rs232-rs485 {
34 pmx_sdio_cd: pmx-sdio-cd {
38 pmx_select34: pmx-select-uart-sd {
49 nr-ports = <2>;
[all …]
|
| /openbmc/linux/arch/powerpc/platforms/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
28 select EPAPR_PARAVIRT
37 bool "ePAPR para-virtualization support"
39 Enables ePAPR para-virtualization support for guests.
48 a hypervisor. This option is not user-selectable but should
54 select RELOCATABLE if PPC64
65 bool "Device-tree based CPU feature discovery & setup"
82 Select this option if your platform supports SMP and your
114 select EPAPR_PARAVIRT
124 registers are used for inter-processor communication.
[all …]
|
| /openbmc/phosphor-buttons/ |
| H A D | README.md | 1 # phosphor-buttons
3 Phosphor-buttons has a collection of IO event handler interfaces for physical
8 its associated IO for event changes and emits signals that the button-handler
22 - Short press: Do a host power off
23 - Long press, as determined by the 'long-press-time-ms' meson option: Do a
28 The 'power-button-profile' meson option can be used to select custom power
33 - host_then_chassis_poweroff: When power is on, short presses are ignored and a
38 ### Multi-Host Buttons
40 See [this section below](#group-gpio-config).
46 - If 'reset-button-do-warm-reboot' meson option is set to enabled, does warm
[all …]
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | kirkwood-openrd.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
12 #include "kirkwood-6281.dtsi"
22 stdout-path = &uart0;
26 pinctrl: pin-controller@10000 {
27 pinctrl-0 = <&pmx_select28 &pmx_sdio_cd &pmx_select34>;
28 pinctrl-names = "default";
30 pmx_select28: pmx-select-rs232-rs485 {
34 pmx_sdio_cd: pmx-sdio-cd {
38 pmx_select34: pmx-select-uart-sd {
49 nr-ports = <2>;
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/mtd/ |
| H A D | fsl-upm-nand.txt | 4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
11 The corresponding address lines are used to select the chip.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/misc/ |
| H A D | ifm-csi.txt | 4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
9 GPIOs (strictly in this order).
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
[all …]
|
| /openbmc/linux/drivers/pinctrl/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
19 select PINMUX
26 select PINCONF
38 select GPIOLIB
39 select GPIOLIB_IRQCHIP
40 select PINMUX
41 select PINCONF
42 select GENERIC_PINCONF
55 select PINMUX
56 select GPIOLIB
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/eeprom/ |
| H A D | microchip,93lc46b.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cory Tusar <cory.tusar@pid1solutions.com>
15 - atmel,at93c46
16 - atmel,at93c46d
17 - atmel,at93c56
18 - atmel,at93c66
19 - eeprom-93xx46
20 - microchip,93lc46b
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/gpio/ |
| H A D | gpio-consumer-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-consumer-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bartosz Golaszewski <brgl@bgdev.pl>
11 - Linus Walleij <linus.walleij@linaro.org>
14 Pay attention to using proper GPIO flag (e.g. GPIO_ACTIVE_LOW) for the GPIOs
17 select: true
20 enable-gpios:
25 reset-gpios:
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/regulator/ |
| H A D | richtek,rt6245-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rt6245-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
13 The RT6245 is a high-performance, synchronous step-down converter
18 - $ref: regulator.yaml#
23 - richtek,rt6245
28 enable-gpios:
31 it will be treat as a default-on power.
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/fpga/ |
| H A D | altera-passive-serial.txt | 11 - compatible: Must be one of the following:
12 "altr,fpga-passive-serial",
13 "altr,fpga-arria10-passive-serial"
14 - reg: SPI chip select of the FPGA
15 - nconfig-gpios: config pin (referred to as nCONFIG in the manual)
16 - nstat-gpios: status pin (referred to as nSTATUS in the manual)
19 - confd-gpios: confd pin (referred to as CONF_DONE in the manual)
23 compatible = "altr,fpga-passive-serial";
24 spi-max-frequency = <20000000>;
26 nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
[all …]
|