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Searched full:sctrl (Results 1 – 25 of 30) sorted by relevance

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/openbmc/qemu/hw/nvme/
H A Dsubsys.c21 NvmeSecCtrlEntry *sctrl; in nvme_subsys_reserve_cntlids() local
26 sctrl = &list[cnt]; in nvme_subsys_reserve_cntlids()
27 sctrl->scid = cpu_to_le16(i); in nvme_subsys_reserve_cntlids()
40 NvmeSecCtrlEntry *sctrl; in nvme_subsys_unreserve_cntlids() local
44 sctrl = &list[i]; in nvme_subsys_unreserve_cntlids()
45 cntlid = le16_to_cpu(sctrl->scid); in nvme_subsys_unreserve_cntlids()
50 sctrl->scid = 0; in nvme_subsys_unreserve_cntlids()
58 NvmeSecCtrlEntry *sctrl = nvme_sctrl(n); in nvme_subsys_register_ctrl() local
62 cntlid = le16_to_cpu(sctrl->scid); in nvme_subsys_register_ctrl()
H A Dctrl.c7006 static void nvme_update_virt_res(NvmeCtrl *n, NvmeSecCtrlEntry *sctrl, in nvme_update_virt_res() argument
7012 prev_nr = le16_to_cpu(sctrl->nvi); in nvme_update_virt_res()
7014 sctrl->nvi = cpu_to_le16(nr); in nvme_update_virt_res()
7017 prev_nr = le16_to_cpu(sctrl->nvq); in nvme_update_virt_res()
7019 sctrl->nvq = cpu_to_le16(nr); in nvme_update_virt_res()
7028 NvmeSecCtrlEntry *sctrl; in nvme_assign_virt_res_to_sec() local
7030 sctrl = nvme_sctrl_for_cntlid(n, cntlid); in nvme_assign_virt_res_to_sec()
7031 if (!sctrl) { in nvme_assign_virt_res_to_sec()
7035 if (sctrl->scs) { in nvme_assign_virt_res_to_sec()
7046 diff = nr - le16_to_cpu(rt ? sctrl->nvi : sctrl->nvq); in nvme_assign_virt_res_to_sec()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dhisilicon,hi3670-usb3.yaml30 hisilicon,sctrl-syscon:
47 - hisilicon,sctrl-syscon
61 hisilicon,sctrl-syscon = <&sctrl>;
/openbmc/linux/drivers/slimbus/
H A Dqcom-ctrl.c278 static int qcom_clk_pause_wakeup(struct slim_controller *sctrl) in qcom_clk_pause_wakeup() argument
280 struct qcom_slim_ctrl *ctrl = dev_get_drvdata(sctrl->dev); in qcom_clk_pause_wakeup()
325 static int qcom_xfer_msg(struct slim_controller *sctrl, in qcom_xfer_msg() argument
328 struct qcom_slim_ctrl *ctrl = dev_get_drvdata(sctrl->dev); in qcom_xfer_msg()
389 static int qcom_set_laddr(struct slim_controller *sctrl, in qcom_set_laddr() argument
392 struct qcom_slim_ctrl *ctrl = dev_get_drvdata(sctrl->dev); in qcom_set_laddr()
490 struct slim_controller *sctrl; in qcom_slim_probe() local
515 sctrl = &ctrl->ctrl; in qcom_slim_probe()
516 sctrl->dev = &pdev->dev; in qcom_slim_probe()
525 sctrl->set_laddr = qcom_set_laddr; in qcom_slim_probe()
[all …]
H A Dqcom-ngd-ctrl.c786 static int qcom_slim_ngd_xfer_msg(struct slim_controller *sctrl, in qcom_slim_ngd_xfer_msg() argument
789 struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(sctrl->dev); in qcom_slim_ngd_xfer_msg()
848 ret = slim_alloc_txn_tid(sctrl, txn); in qcom_slim_ngd_xfer_msg()
896 dev_err(sctrl->dev, "TX timed out:MC:0x%x,mt:0x%x", txn->mc, in qcom_slim_ngd_xfer_msg()
905 dev_err(sctrl->dev, "TX timed out:MC:0x%x,mt:0x%x", in qcom_slim_ngd_xfer_msg()
/openbmc/linux/drivers/phy/hisilicon/
H A Dphy-hi3670-usb3.c130 struct regmap *sctrl; member
327 if (!priv->sctrl) { in hi3670_is_abbclk_selected()
328 dev_err(priv->dev, "priv->sctrl is null!\n"); in hi3670_is_abbclk_selected()
332 if (regmap_read(priv->sctrl, SCTRL_SCDEEPSLEEPED, &reg)) { in hi3670_is_abbclk_selected()
614 priv->sctrl = syscon_regmap_lookup_by_phandle(dev->of_node, in hi3670_phy_probe()
615 "hisilicon,sctrl-syscon"); in hi3670_phy_probe()
616 if (IS_ERR(priv->sctrl)) { in hi3670_phy_probe()
617 dev_err(dev, "no hisilicon,sctrl-syscon\n"); in hi3670_phy_probe()
618 return PTR_ERR(priv->sctrl); in hi3670_phy_probe()
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3670.dtsi173 sctrl: sctrl@fff0a000 { label
174 compatible = "hisilicon,hi3670-sctrl", "syscon";
522 clocks = <&sctrl HI3670_PCLK_GPIO18>;
535 clocks = <&sctrl HI3670_PCLK_GPIO19>;
575 clocks = <&sctrl HI3670_PCLK_AO_GPIO0>;
589 clocks = <&sctrl HI3670_PCLK_AO_GPIO1>;
603 clocks = <&sctrl HI3670_PCLK_AO_GPIO2>;
617 clocks = <&sctrl HI3670_PCLK_AO_GPIO3>;
631 clocks = <&sctrl HI3670_PCLK_AO_GPIO4>;
645 clocks = <&sctrl HI3670_PCLK_AO_GPIO5>;
[all …]
H A Dhi3660.dtsi368 sctrl: sctrl@fff0a000 { label
369 compatible = "hisilicon,hi3660-sctrl", "syscon";
886 clocks = <&sctrl HI3660_PCLK_AO_GPIO0>;
900 clocks = <&sctrl HI3660_PCLK_AO_GPIO1>;
914 clocks = <&sctrl HI3660_PCLK_AO_GPIO2>;
928 clocks = <&sctrl HI3660_PCLK_AO_GPIO3>;
942 clocks = <&sctrl HI3660_PCLK_AO_GPIO4>;
956 clocks = <&sctrl HI3660_PCLK_AO_GPIO5>;
968 clocks = <&sctrl HI3660_PCLK_AO_GPIO6>;
1072 hisilicon,peripheral-syscon = <&sctrl>;
/openbmc/linux/drivers/hv/
H A Dhv.c270 union hv_synic_scontrol sctrl; in hv_synic_enable_regs() local
333 sctrl.as_uint64 = hv_get_register(HV_REGISTER_SCONTROL); in hv_synic_enable_regs()
334 sctrl.enable = 1; in hv_synic_enable_regs()
336 hv_set_register(HV_REGISTER_SCONTROL, sctrl.as_uint64); in hv_synic_enable_regs()
358 union hv_synic_scontrol sctrl; in hv_synic_disable_regs() local
400 sctrl.as_uint64 = hv_get_register(HV_REGISTER_SCONTROL); in hv_synic_disable_regs()
401 sctrl.enable = 0; in hv_synic_disable_regs()
402 hv_set_register(HV_REGISTER_SCONTROL, sctrl.as_uint64); in hv_synic_disable_regs()
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dmcp77.c35 u32 cctrl, sctrl; member
250 clk->sctrl = (divs + P2) << 16; in mcp77_clk_calc()
254 clk->sctrl = P1 << 16; in mcp77_clk_calc()
273 clk->scoef, clk->spost, clk->sctrl); in mcp77_clk_calc()
338 nvkm_mask(device, 0x4020, 0x00070000, clk->sctrl); in mcp77_clk_prog()
343 nvkm_wr32(device, 0x4020, 0x80000000 | clk->sctrl); in mcp77_clk_prog()
/openbmc/linux/sound/pci/
H A Dens1370.c377 unsigned int sctrl; /* serial control register */ member
809 ensoniq->sctrl |= what; in snd_ensoniq_trigger()
811 ensoniq->sctrl &= ~what; in snd_ensoniq_trigger()
812 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); in snd_ensoniq_trigger()
877 ensoniq->sctrl &= ~(ES_P1_LOOP_SEL | ES_P1_PAUSE | ES_P1_SCT_RLD | ES_P1_MODEM); in snd_ensoniq_playback1_prepare()
878 ensoniq->sctrl |= ES_P1_INT_EN | ES_P1_MODEO(mode); in snd_ensoniq_playback1_prepare()
879 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); in snd_ensoniq_playback1_prepare()
918 ensoniq->sctrl &= ~(ES_P2_LOOP_SEL | ES_P2_PAUSE | ES_P2_DAC_SEN | in snd_ensoniq_playback2_prepare()
920 ensoniq->sctrl |= ES_P2_INT_EN | ES_P2_MODEO(mode) | in snd_ensoniq_playback2_prepare()
922 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); in snd_ensoniq_playback2_prepare()
[all …]
/openbmc/linux/arch/arm64/boot/dts/bitmain/
H A Dbm1880.dtsi91 sctrl: system-controller@50010000 { label
92 compatible = "bitmain,bm1880-sctrl", "syscon",
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dhi3670-clock.txt14 - "hisilicon,hi3670-sctrl"
H A Dhi3660-clock.txt14 - "hisilicon,hi3660-sctrl"
H A Dhi6220-clock.txt14 - "hisilicon,hi6220-acpu-sctrl"
/openbmc/u-boot/arch/arm/cpu/armv7/
H A Dcpu.c51 * bit in CP15 SCTRL is all we did during this. We have not in cleanup_before_linux_select()
/openbmc/linux/drivers/isdn/hardware/mISDN/
H A Dhfcpci.c90 unsigned char sctrl; member
174 hc->hw.sctrl |= SCTRL_MODE_NT; /* NT-MODE */ in hfcpci_setmode()
178 hc->hw.sctrl &= ~SCTRL_MODE_NT; /* TE-MODE */ in hfcpci_setmode()
185 Write_hfc(hc, HFCPCI_SCTRL, hc->hw.sctrl); in hfcpci_setmode()
231 hc->hw.sctrl = 0x40; /* set tx_lo mode, error in datasheet ! */ in reset_hfcpci()
1288 hc->hw.sctrl &= ~SCTRL_B2_ENA; in mode_hfcpci()
1291 hc->hw.sctrl &= ~SCTRL_B1_ENA; in mode_hfcpci()
1320 hc->hw.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
1326 hc->hw.sctrl |= SCTRL_B1_ENA; in mode_hfcpci()
1355 hc->hw.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
[all …]
H A Dhfcsusb.c687 __u8 conhdlc, sctrl, sctrl_r; in hfcsusb_setup_bch() local
734 sctrl = 0x40 + ((hw->protocol == ISDN_P_TE_S0) ? 0x00 : 0x04); in hfcsusb_setup_bch()
737 sctrl |= 1; in hfcsusb_setup_bch()
741 sctrl |= 2; in hfcsusb_setup_bch()
744 write_reg(hw, HFCUSB_SCTRL, sctrl); in hfcsusb_setup_bch()
/openbmc/linux/include/dt-bindings/clock/
H A Dhi6220-clock.h175 /* clk in Hi6220 acpu sctrl */
H A Dhi3660-clock.h178 /* clk in sctrl */
H A Dhi3670-clock.h244 /* clk in sctrl */
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dbitmain,bm1880-pinctrl.txt8 - reg: Offset and length of pinctrl space in SCTRL.
/openbmc/linux/arch/arm/common/
H A Dmcpm_entry.c32 * The CPU cache (SCTRL.C bit) is expected to still be active.
44 * The CPU cache (SCTRL.C bit) is expected to be off.
/openbmc/linux/arch/arm/kernel/
H A Dhead-nommu.S168 orreq r0, r0, #CR_M @ Set SCTRL.M (MPU on)
/openbmc/linux/drivers/clk/hisilicon/
H A Dclk-hi6220.c304 CLK_OF_DECLARE(hi6220_clk_acpu, "hisilicon,hi6220-acpu-sctrl", hi6220_clk_acpu_init);

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