1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 2f56348afSSteve Sakoman /* 3f56348afSSteve Sakoman * (C) Copyright 2008 Texas Insturments 4f56348afSSteve Sakoman * 5f56348afSSteve Sakoman * (C) Copyright 2002 6f56348afSSteve Sakoman * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 7f56348afSSteve Sakoman * Marius Groeger <mgroeger@sysgo.de> 8f56348afSSteve Sakoman * 9f56348afSSteve Sakoman * (C) Copyright 2002 10f56348afSSteve Sakoman * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> 11f56348afSSteve Sakoman */ 12f56348afSSteve Sakoman 13f56348afSSteve Sakoman /* 14f56348afSSteve Sakoman * CPU specific code 15f56348afSSteve Sakoman */ 16f56348afSSteve Sakoman 17f56348afSSteve Sakoman #include <common.h> 18f56348afSSteve Sakoman #include <command.h> 19f56348afSSteve Sakoman #include <asm/system.h> 20f56348afSSteve Sakoman #include <asm/cache.h> 21c2dd0d45SAneesh V #include <asm/armv7.h> 2253e6f6a6SMathieu J. Poirier #include <linux/compiler.h> 23f56348afSSteve Sakoman cpu_cache_initialization(void)2453e6f6a6SMathieu J. Poiriervoid __weak cpu_cache_initialization(void){} 2553e6f6a6SMathieu J. Poirier cleanup_before_linux_select(int flags)264d24a11eSSimon Glassint cleanup_before_linux_select(int flags) 27f56348afSSteve Sakoman { 28f56348afSSteve Sakoman /* 29f56348afSSteve Sakoman * this function is called just before we call linux 30f56348afSSteve Sakoman * it prepares the processor for linux 31f56348afSSteve Sakoman * 32f56348afSSteve Sakoman * we turn off caches etc ... 33f56348afSSteve Sakoman */ 34d460587aSStefano Babic #ifndef CONFIG_SPL_BUILD 35f56348afSSteve Sakoman disable_interrupts(); 36d460587aSStefano Babic #endif 37f56348afSSteve Sakoman 384d24a11eSSimon Glass if (flags & CBL_DISABLE_CACHES) { 39c2dd0d45SAneesh V /* 40c2dd0d45SAneesh V * turn off D-cache 41c2dd0d45SAneesh V * dcache_disable() in turn flushes the d-cache and disables MMU 42c2dd0d45SAneesh V */ 43f56348afSSteve Sakoman dcache_disable(); 44dc7100f4SAneesh V v7_outer_cache_disable(); 45f56348afSSteve Sakoman 46c2dd0d45SAneesh V /* 47c2dd0d45SAneesh V * After D-cache is flushed and before it is disabled there may 484d24a11eSSimon Glass * be some new valid entries brought into the cache. We are 494d24a11eSSimon Glass * sure that these lines are not dirty and will not affect our 504d24a11eSSimon Glass * execution. (because unwinding the call-stack and setting a 514d24a11eSSimon Glass * bit in CP15 SCTRL is all we did during this. We have not 524d24a11eSSimon Glass * pushed anything on to the stack. Neither have we affected 534d24a11eSSimon Glass * any static data) So just invalidate the entire d-cache again 544d24a11eSSimon Glass * to avoid coherency problems for kernel 55c2dd0d45SAneesh V */ 56c2dd0d45SAneesh V invalidate_dcache_all(); 5781b0618dSSjoerd Simons 5881b0618dSSjoerd Simons icache_disable(); 5981b0618dSSjoerd Simons invalidate_icache_all(); 604d24a11eSSimon Glass } else { 6181b0618dSSjoerd Simons /* 6281b0618dSSjoerd Simons * Turn off I-cache and invalidate it 6381b0618dSSjoerd Simons */ 6481b0618dSSjoerd Simons icache_disable(); 6581b0618dSSjoerd Simons invalidate_icache_all(); 6681b0618dSSjoerd Simons 674d24a11eSSimon Glass flush_dcache_all(); 684d24a11eSSimon Glass invalidate_icache_all(); 694d24a11eSSimon Glass icache_enable(); 704d24a11eSSimon Glass } 71f56348afSSteve Sakoman 7253e6f6a6SMathieu J. Poirier /* 7353e6f6a6SMathieu J. Poirier * Some CPU need more cache attention before starting the kernel. 7453e6f6a6SMathieu J. Poirier */ 7553e6f6a6SMathieu J. Poirier cpu_cache_initialization(); 7653e6f6a6SMathieu J. Poirier 77f56348afSSteve Sakoman return 0; 78f56348afSSteve Sakoman } 794d24a11eSSimon Glass cleanup_before_linux(void)804d24a11eSSimon Glassint cleanup_before_linux(void) 814d24a11eSSimon Glass { 824d24a11eSSimon Glass return cleanup_before_linux_select(CBL_ALL); 834d24a11eSSimon Glass } 84