xref: /openbmc/linux/Documentation/devicetree/bindings/clock/hi3660-clock.txt (revision 552c69b36ebd966186573b9c7a286b390935cce1)
170c497deSZhangfei Gao* Hisilicon Hi3660 Clock Controller
270c497deSZhangfei Gao
370c497deSZhangfei GaoThe Hi3660 clock controller generates and supplies clock to various
470c497deSZhangfei Gaocontrollers within the Hi3660 SoC.
570c497deSZhangfei Gao
670c497deSZhangfei GaoRequired Properties:
770c497deSZhangfei Gao
870c497deSZhangfei Gao- compatible: the compatible should be one of the following strings to
970c497deSZhangfei Gao	indicate the clock controller functionality.
1070c497deSZhangfei Gao
1170c497deSZhangfei Gao	- "hisilicon,hi3660-crgctrl"
1270c497deSZhangfei Gao	- "hisilicon,hi3660-pctrl"
1370c497deSZhangfei Gao	- "hisilicon,hi3660-pmuctrl"
1470c497deSZhangfei Gao	- "hisilicon,hi3660-sctrl"
1570c497deSZhangfei Gao	- "hisilicon,hi3660-iomcu"
16*a4a124c3SLeo Yan	- "hisilicon,hi3660-stub-clk"
1770c497deSZhangfei Gao
1870c497deSZhangfei Gao- reg: physical base address of the controller and length of memory mapped
1970c497deSZhangfei Gao  region.
2070c497deSZhangfei Gao
2170c497deSZhangfei Gao- #clock-cells: should be 1.
2270c497deSZhangfei Gao
23*a4a124c3SLeo YanOptional Properties:
24*a4a124c3SLeo Yan
25*a4a124c3SLeo Yan- mboxes: Phandle to the mailbox for sending message to MCU.
26*a4a124c3SLeo Yan            (See: ../mailbox/hisilicon,hi3660-mailbox.txt for more info)
27*a4a124c3SLeo Yan
2870c497deSZhangfei GaoEach clock is assigned an identifier and client nodes use this identifier
2970c497deSZhangfei Gaoto specify the clock which they consume.
3070c497deSZhangfei Gao
3170c497deSZhangfei GaoAll these identifier could be found in <dt-bindings/clock/hi3660-clock.h>.
3270c497deSZhangfei Gao
3370c497deSZhangfei GaoExamples:
3470c497deSZhangfei Gao	crg_ctrl: clock-controller@fff35000 {
3570c497deSZhangfei Gao		compatible = "hisilicon,hi3660-crgctrl", "syscon";
3670c497deSZhangfei Gao		reg = <0x0 0xfff35000 0x0 0x1000>;
3770c497deSZhangfei Gao		#clock-cells = <1>;
3870c497deSZhangfei Gao	};
3970c497deSZhangfei Gao
4070c497deSZhangfei Gao	uart0: serial@fdf02000 {
4170c497deSZhangfei Gao		compatible = "arm,pl011", "arm,primecell";
4270c497deSZhangfei Gao		reg = <0x0 0xfdf02000 0x0 0x1000>;
4370c497deSZhangfei Gao		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
4470c497deSZhangfei Gao		clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>,
4570c497deSZhangfei Gao			 <&crg_ctrl HI3660_PCLK>;
4670c497deSZhangfei Gao		clock-names = "uartclk", "apb_pclk";
4770c497deSZhangfei Gao	};
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