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/openbmc/linux/Documentation/devicetree/bindings/rtc/
H A Dingenic,rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs Real-Time Clock
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: rtc.yaml#
14 - if:
20 - ingenic,jz4770-rtc
21 - ingenic,jz4780-rtc
24 "#clock-cells": false
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dti,tas5086.txt1 Texas Instruments TAS5086 6-channel PWM Processor
5 - compatible: Should contain "ti,tas5086".
6 - reg: The i2c address. Should contain <0x1b>.
10 - reset-gpio: A GPIO spec to define which pin is connected to the
11 chip's !RESET pin. If specified, the driver will
12 assert a hardware reset at probe time.
14 - ti,charge-period: This property should contain the time in microseconds
15 that closely matches the external single-ended
16 split-capacitor charge period. The hardware chip
17 waits for this period of time before starting the
[all …]
/openbmc/linux/drivers/rtc/
H A Drtc-jz4740.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
9 #include <linux/clk-provider.h>
75 return readl(rtc->base + reg); in jz4740_rtc_reg_read()
82 return readl_poll_timeout(rtc->base + JZ_REG_RTC_CTRL, ctrl, in jz4740_rtc_wait_write_ready()
95 writel(JZ_RTC_WENR_MAGIC, rtc->base + JZ_REG_RTC_WENR); in jz4780_rtc_enable_write()
97 return readl_poll_timeout(rtc->base + JZ_REG_RTC_WENR, ctrl, in jz4780_rtc_enable_write()
106 if (rtc->type >= ID_JZ4760) in jz4740_rtc_reg_write()
111 writel(val, rtc->base + reg); in jz4740_rtc_reg_write()
123 spin_lock_irqsave(&rtc->lock, flags); in jz4740_rtc_ctrl_set_bits()
[all …]
/openbmc/linux/drivers/pps/clients/
H A Dpps-gpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pps-gpio.c -- PPS client driver using GPIO
9 #define PPS_GPIO_NAME "pps-gpio"
33 struct timer_list echo_timer; /* timer to reset echo active state */
50 /* Get the time stamp first */ in pps_gpio_irq_handler()
55 rising_edge = gpiod_get_value(info->gpio_pin); in pps_gpio_irq_handler()
56 if ((rising_edge && !info->assert_falling_edge) || in pps_gpio_irq_handler()
57 (!rising_edge && info->assert_falling_edge)) in pps_gpio_irq_handler()
58 pps_event(info->pps, &ts, PPS_CAPTUREASSERT, data); in pps_gpio_irq_handler()
59 else if (info->capture_clear && in pps_gpio_irq_handler()
[all …]
/openbmc/linux/drivers/gpu/drm/bridge/
H A Dparade-ps8622.c1 // SPDX-License-Identifier: GPL-2.0-only
68 struct i2c_adapter *adap = client->adapter; in ps8622_set()
72 msg.addr = client->addr + page; in ps8622_set()
80 client->addr + page, reg, val, ret); in ps8622_set()
86 struct i2c_client *cl = ps8622->client; in ps8622_send_config()
137 /* [7:5] DCO_FTRNG=+-40% */ in ps8622_send_config()
147 /* Gitune=-37% */ in ps8622_send_config()
167 /* [7:6] Right-bar GPIO output strength is 8mA */ in ps8622_send_config()
179 err = ps8622_set(cl, 0x01, 0x02, 0x80 | ps8622->max_lane_count); in ps8622_send_config()
184 err = ps8622_set(cl, 0x01, 0x21, 0x80 | ps8622->lane_count); in ps8622_send_config()
[all …]
/openbmc/linux/arch/mips/include/asm/sn/
H A Dioc3.h1 /* SPDX-License-Identifier: GPL-2.0 */
50 u8 fill0[0x151 - 0x142 - 1];
56 u8 fill1[0x159 - 0x153 - 1];
62 u8 fill2[0x16a - 0x15b - 1];
67 u8 fill3[0x170 - 0x16b - 1];
153 u32 pad1[(0x20000 - 0x00154) / 4];
157 u32 pad2[(0x40000 - 0x20180) / 4];
160 u32 ssram[(0x80000 - 0x40000) / 4];
163 0x80000 - Access to the generic devices selected with DEV0
165 0xA0000 - Access to the generic devices selected with DEV1
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/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-gru-scarlet.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-scarlet board device tree source
8 #include "rk3399-gru.dtsi"
11 chassis-type = "tablet";
16 pp1250_s3: pp1250-s3 {
17 compatible = "regulator-fixed";
18 regulator-name = "pp1250_s3";
21 regulator-always-on;
22 regulator-boot-on;
23 regulator-min-microvolt = <1250000>;
[all …]
/openbmc/qemu/hw/block/
H A Dpflash_cfi02.c23 * - flash read
24 * - flash write
25 * - flash ID read
26 * - sector erase
27 * - chip erase
28 * - unlock bypass command
29 * - CFI queries
38 #include "hw/qdev-properties.h"
39 #include "hw/qdev-properties-system.h"
41 #include "qemu/error-report.h"
[all …]
/openbmc/qemu/hw/vfio/
H A Dplatform.c2 * vfio based device assignment support - platform devices
11 * the COPYING file in the top-level directory.
23 #include "hw/vfio/vfio-platform.h"
26 #include "qemu/error-report.h"
28 #include "qemu/main-loop.h"
32 #include "exec/address-spaces.h"
37 #include "hw/platform-bus.h"
38 #include "hw/qdev-properties.h"
47 return intp->flags & VFIO_IRQ_INFO_AUTOMASKED; in vfio_irq_is_automasked()
51 * vfio_init_intp - allocate, initialize the IRQ struct pointer
[all …]
/openbmc/linux/drivers/input/touchscreen/
H A Diqs7211.c1 // SPDX-License-Identifier: GPL-2.0-or-later
52 * The following delay is used during instances that must wait for the open-
53 * drain RDY pin to settle. Its value is calculated as 5*R*C, where R and C
124 .name = "event-prox",
131 .name = "event-touch",
138 .name = "event-tap",
145 .name = "event-hold",
152 .name = "event-swipe-x-neg",
159 .name = "event-swipe-x-pos",
166 .name = "event-swipe-y-pos",
[all …]
/openbmc/qemu/hw/arm/
H A Dvirt.c2 * ARM mach-virt emulation
23 * + we want to present a very stripped-down minimalist platform,
41 #include "hw/vfio/vfio-calxeda-xgmac.h"
42 #include "hw/vfio/vfio-amd-xgbe.h"
56 #include "qemu/error-report.h"
58 #include "hw/pci-host/gpex.h"
59 #include "hw/virtio/virtio-pci.h"
60 #include "hw/core/sysbus-fdt.h"
61 #include "hw/platform-bus.h"
62 #include "hw/qdev-properties.h"
[all …]
/openbmc/linux/drivers/net/ethernet/chelsio/cxgb/
H A Dpm3393.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * PMC/SIERRA (pm3393) MAC-PHY functionality. *
14 * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
87 t1_tpi_read(cmac->adapter, OFFSET(reg), data32); in pmread()
93 t1_tpi_write(cmac->adapter, OFFSET(reg), data32); in pmwrite()
97 /* Port reset. */
115 /* PM3393 - Enabling all hardware block interrupts. in pm3393_interrupt_enable()
138 /* PM3393 - Global interrupt enable in pm3393_interrupt_enable()
144 /* TERMINATOR - PL_INTERUPTS_EXT */ in pm3393_interrupt_enable()
145 pl_intr = readl(cmac->adapter->regs + A_PL_ENABLE); in pm3393_interrupt_enable()
[all …]
/openbmc/linux/drivers/bluetooth/
H A Dhci_bcm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
53 * struct bcm_device_data - device specific data
55 * @drive_rts_on_open: drive RTS signal on ->open() when platform requires it
69 * struct bcm_device - device driver resources
74 * @device_wakeup: BT_WAKE pin,
75 * assert = Bluetooth device must wake up or remain awake,
77 * @shutdown: BT_REG_ON pin,
79 * @reset: BT_RST_N pin,
81 * @set_device_wakeup: callback to toggle BT_WAKE pin
83 * @set_shutdown: callback to toggle BT_REG_ON pin
[all …]
/openbmc/linux/drivers/net/ethernet/intel/igb/
H A De1000_defines.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
44 #define E1000_CTRL_EXT_SDP2_DATA 0x00000040 /* Value of SW Defineable Pin 2 */
45 #define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Defineable Pin 3 */
49 /* Physical Func Reset Done Indication */
62 /* Interrupt acknowledge Auto-mask */
91 #define E1000_RXD_STAT_TS 0x10000 /* Pkt was time stamped */
118 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
119 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
183 #define E1000_CTRL_LRST 0x00000008 /* Link reset. 0=normal,1=reset */
[all …]
/openbmc/linux/drivers/macintosh/
H A Dvia-cuda.c1 // SPDX-License-Identifier: GPL-2.0
7 * This MCU controls system power, Parameter RAM, Real Time Clock and the
38 /* VIA registers - spaced 0x200 bytes apart */
40 #define B 0 /* B-side data */
41 #define A RS /* A-side data */
42 #define DIRB (2*RS) /* B-side direction (1=output) */
43 #define DIRA (3*RS) /* A-side direction (1=output) */
55 #define ANH (15*RS) /* A-side data, no handshake */
61 * VIA pin | Egret pin
62 * ----------------+------------------------------------------
[all …]
/openbmc/linux/drivers/net/ethernet/marvell/
H A Dskge.h1 /* SPDX-License-Identifier: GPL-2.0 */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
143 CS_MRST_CLR = 1<<3, /* Clear Master reset */
144 CS_MRST_SET = 1<<2, /* Set Master reset */
145 CS_RST_CLR = 1<<1, /* Clear Software reset */
146 CS_RST_SET = 1, /* Set Software reset */
217 IS_IRQ_TIST_OV = 1<<13, /* Time Stamp Timer Overflow (YUKON only) */
223 IS_NO_TIST_M1 = 1<<7, /* No Time Stamp from MAC 1 */
[all …]
/openbmc/u-boot/drivers/video/sunxi/
H A Dsunxi_display.c1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2013-2014 Luc Verhaegen <libv@skynet.be>
6 * (C) Copyright 2014-2015 Hans de Goede <hdegoede@redhat.com>
74 * Wait up to 200ms for value to be set in given part of reg.
83 return -ETIME; in await_completion()
101 clrsetbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_PLL_MASK, in sunxi_hdmi_hpd_detect()
106 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_HDMI); in sunxi_hdmi_hpd_detect()
108 setbits_le32(&ccm->ahb_gate1, 1 << AHB_GATE_OFFSET_HDMI); in sunxi_hdmi_hpd_detect()
111 setbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_GATE); in sunxi_hdmi_hpd_detect()
113 writel(SUNXI_HDMI_CTRL_ENABLE, &hdmi->ctrl); in sunxi_hdmi_hpd_detect()
[all …]
/openbmc/linux/drivers/usb/host/
H A Docteon-hcd.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
104 * This register can be used to configure the core after power-on or a change in
105 * mode of operation. This register mainly contains AHB system-related
126 * @nptxfemplvl: Non-Periodic TxFIFO Empty Level (NPTxFEmpLvl)
128 * Indicates when the Non-Periodic TxFIFO Empty Interrupt bit in
131 * * 1'b0: GINTSTS.NPTxFEmp interrupt indicates that the Non-
133 * * 1'b1: GINTSTS.NPTxFEmp interrupt indicates that the Non-
172 * This value is in terms of 32-bit words.
181 * @rsttype: Reset Style for Clocked always Blocks in RTL (RstType)
[all …]
/openbmc/qemu/accel/kvm/
H A Dkvm-all.c12 * See the COPYING file in the top-level directory.
24 #include "qemu/config-file.h"
25 #include "qemu/error-report.h"
34 #include "sysemu/accel-blocker.h"
39 #include "qemu/main-loop.h"
43 #include "qapi/qapi-types-common.h"
44 #include "qapi/qapi-visit-common.h"
45 #include "sysemu/reset.h"
46 #include "qemu/guest-random.h"
48 #include "kvm-cpus.h"
[all …]
/openbmc/u-boot/doc/
H A DREADME.x861 # SPDX-License-Identifier: GPL-2.0+
6 U-Boot on x86
9 This document describes the information about U-Boot running on x86 targets,
13 ------
14 U-Boot supports running as a coreboot [1] payload on x86. So far only Link
17 most of the low-level details.
19 U-Boot is a main bootloader on Intel Edison board.
21 U-Boot also supports booting directly from x86 reset vector, without coreboot.
23 'bare metal', U-Boot acts like a BIOS replacement. The following platforms
26 - Bayley Bay CRB
[all …]
/openbmc/linux/drivers/iio/light/
H A Drpr0521.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * RPR-0521 ROHM Ambient Light and Proximity Sensor
7 * IIO driver for RPR-0521RS (7-bit I2C slave address 0x38).
31 #define RPR0521_REG_PXS_DATA 0x44 /* 16-bit, little endian */
32 #define RPR0521_REG_ALS_DATA0 0x46 /* 16-bit, little endian */
33 #define RPR0521_REG_ALS_DATA1 0x48 /* 16-bit, little endian */
68 #define RPR0521_DEFAULT_MEAS_TIME 0x06 /* ALS - 100ms, PXS - 100ms */
170 {2, 500000, 20, 0}, /* 1000, measurement 100ms, sleep 300ms */
171 {2, 500000, 10, 0}, /* 1001, measurement 100ms, sleep 300ms */
190 /* optimize runtime pm ops - enable/disable device only if needed */
[all …]
/openbmc/u-boot/board/gateworks/gw_ventana/
H A Dgw_ventana.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/mx6-pins.h>
16 #include <asm/mach-imx/boot_mode.h>
17 #include <asm/mach-imx/sata.h>
18 #include <asm/mach-imx/spi.h>
19 #include <asm/mach-imx/video.h>
107 clrsetbits_le32(&mxc_ccm->cs2cdr, in setup_gpmi_nand()
116 setbits_le32(&mxc_ccm->CCGR4, in setup_gpmi_nand()
124 setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); in setup_gpmi_nand()
154 /* Reset USB HUB */ in board_ehci_hcd_init()
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-ux500-samsung-skomer.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung XCover 2 GT-S7710 also known as Skomer.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8505.dtsi"
9 #include "ste-dbx5x0-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
H A Dste-ux500-samsung-kyle.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Amp SGH-I407 also known as Kyle.
10 /dts-v1/;
11 #include "ste-db8500.dtsi"
12 #include "ste-ab8505.dtsi"
13 #include "ste-dbx5x0-pinctrl.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/leds/common.h>
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
/openbmc/u-boot/drivers/phy/marvell/
H A Dcomphy_a3700.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015-2016 Marvell International Ltd.
67 /*-----------------------------------------------------------*/
144 for (timeout = PLL_LOCK_TIMEOUT; timeout > 0; timeout--) { in comphy_poll_reg()
156 debug("Time out waiting (%p = %#010x)\n", addr, rval); in comphy_poll_reg()
235 * 11. Release SW reset in comphy_pcie_power_up()
244 /* Assert PCLK enabled */ in comphy_pcie_power_up()
286 * 1. Select 40-bit data width width in comphy_sata_power_up()
307 * 4. Reset reserved bit (??) in comphy_sata_power_up()
312 * 5. Set vendor-specific configuration (??) in comphy_sata_power_up()
[all …]

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