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/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dsifive,fu740-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/sifive,fu740-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
16 - Paul Walmsley <paul.walmsley@sifive.com>
17 - Greentime Hu <greentime.hu@sifive.com>
20 - $ref: /schemas/pci/snps,dw-pcie.yaml#
24 const: sifive,fu740-pcie
29 reg-names:
[all …]
/openbmc/linux/drivers/pci/controller/dwc/
H A Dpcie-fu740.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2019-2021 SiFive, Inc.
28 #include "pcie-designware.h"
30 #define to_fu740_pcie(x) dev_get_drvdata((x)->dev)
36 struct gpio_desc *pwren; member
83 gpiod_set_value_cansleep(afp->reset, 0); in fu740_pcie_assert_reset()
85 writel_relaxed(0x0, afp->mgmt_base + PCIEX8MGMT_PERST_N); in fu740_pcie_assert_reset()
91 writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_PERST_N); in fu740_pcie_deassert_reset()
93 gpiod_set_value_cansleep(afp->reset, 1); in fu740_pcie_deassert_reset()
98 gpiod_set_value_cansleep(afp->pwren, 1); in fu740_pcie_power_on()
[all …]
/openbmc/openbmc/meta-ampere/meta-jade/recipes-ampere/platform/ampere-platform-init/
H A Dmtjade_platform_gpios_init.sh3 function pre-platform-init() {
8 function post-platform-init() {
13 # add device enable, mux setting, device select gpios
14 "ext-hightemp-n"
15 "vr-pmbus-sel-n"
16 "i2c6-reset-n"
17 "i2c-backup-sel"
18 "power-chassis-control"
19 "host0-shd-req-n"
20 "host0-sysreset-n"
[all …]
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-ampere-mtjefferson.dts1 // SPDX-License-Identifier: GPL-2.0-only
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/gpio/aspeed-gpio.h>
12 compatible = "ampere,mtjefferson-bmc", "aspeed,ast2600";
41 stdout-path = &uart5;
49 reserved-memory {
50 #address-cells = <1>;
51 #size-cells = <1>;
[all …]
H A Daspeed-bmc-ampere-mtmitchell.dts1 // SPDX-License-Identifier: GPL-2.0-only
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/gpio/aspeed-gpio.h>
12 compatible = "ampere,mtmitchell-bmc", "aspeed,ast2600";
27 * i2c bus 30-31 assigned to OCP slot 0-1
33 * i2c bus 32-33 assigned to Riser slot 0-1
39 * i2c bus 38-39 assigned to FRU on Riser slot 0-1
82 stdout-path = &uart5;
[all …]
H A Daspeed-bmc-ampere-mtjade.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
12 * i2c bus 50-57 assigned to NVMe slot 0-7
24 * i2c bus 60-67 assigned to NVMe slot 8-15
36 * i2c bus 70-77 assigned to NVMe slot 16-23
48 * i2c bus 80-81 assigned to NVMe M2 slot 0-1
60 stdout-path = &uart5;
[all …]
/openbmc/openbmc/meta-ampere/meta-mitchell/recipes-ampere/platform/ampere-platform-init/
H A Dmtmitchell_platform_gpios_init.sh7 if [[ ! -e /dev/rtc0 ]]; then
9 echo 6-0051 > /sys/bus/i2c/drivers/rtc-pcf85063/bind
13 function pre-platform-init() {
17 function post-platform-init() {
22 pgood=$(gpioget $(gpiofind power-chassis-good))
25 gpioset $(gpiofind power-chassis-control)=0
28 gpioset $(gpiofind power-chassis-control)=1
31 gpioset $(gpiofind host0-sysreset-n)=1
41 # add device enable, mux setting, device select gpios
42 "spi0-backup-sel"
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-veyron-brain.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron.dtsi"
10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
14 compatible = "google,veyron-brain-rev0", "google,veyron-brain",
17 vcc33_sys: vcc33-sys {
18 vin-supply = <&vcc_5v>;
22 compatible = "regulator-fixed";
23 regulator-name = "vcc33_io";
24 regulator-always-on;
[all …]
H A Drk3288-veyron-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/clock/rockchip,rk808.h>
10 #include <dt-bindings/input/input.h>
11 #include "rk3288-veyron.dtsi"
12 #include "rk3288-veyron-analog-audio.dtsi"
13 #include "rk3288-veyron-edp.dtsi"
14 #include "rk3288-veyron-sdmmc.dtsi"
22 gpio-charger {
23 compatible = "gpio-charger";
24 charger-type = "mains";
[all …]
H A Drk3288-veyron-fievel.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron.dtsi"
10 #include "rk3288-veyron-analog-audio.dtsi"
14 compatible = "google,veyron-fievel-rev8", "google,veyron-fievel-rev7",
15 "google,veyron-fievel-rev6", "google,veyron-fievel-rev5",
16 "google,veyron-fievel-rev4", "google,veyron-fievel-rev3",
17 "google,veyron-fievel-rev2", "google,veyron-fievel-rev1",
18 "google,veyron-fievel-rev0", "google,veyron-fievel",
22 compatible = "regulator-fixed";
[all …]
H A Drk3288-veyron-mickey.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron.dtsi"
10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
14 compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7",
15 "google,veyron-mickey-rev6", "google,veyron-mickey-rev5",
16 "google,veyron-mickey-rev4", "google,veyron-mickey-rev3",
17 "google,veyron-mickey-rev2", "google,veyron-mickey-rev1",
18 "google,veyron-mickey-rev0", "google,veyron-mickey",
21 vcc_5v: vcc-5v {
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-nanopc-t6.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/usb/pd.h>
16 model = "FriendlyElec NanoPC-T6";
17 compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588";
26 stdout-path = "serial2:1500000n8";
30 compatible = "gpio-leds";
32 sys_led: led-0 {
[all …]
H A Drk3368-r88.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
20 stdout-path = "serial2:115200n8";
28 emmc_pwrseq: emmc-pwrseq {
29 compatible = "mmc-pwrseq-emmc";
30 pinctrl-0 = <&emmc_reset>;
31 pinctrl-names = "default";
32 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
35 keys: gpio-keys {
[all …]
H A Drk3368-orion-r68-meta.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
12 compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
20 stdout-path = "serial2:115200n8";
28 emmc_pwrseq: emmc-pwrseq {
29 compatible = "mmc-pwrseq-emmc";
30 pinctrl-0 = <&emmc_reset>;
31 pinctrl-names = "default";
32 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
[all …]
H A Drk3566-radxa-cm3-io.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/soc/rockchip,vop2.h>
10 #include "rk3566-radxa-cm3.dtsi"
14 compatible = "radxa,cm3-io", "radxa,cm3", "rockchip,rk3566";
21 stdout-path = "serial2:1500000n8";
24 gmac1_clkin: external-gmac1-clock {
25 compatible = "fixed-clock";
26 clock-frequency = <125000000>;
27 clock-output-names = "gmac1_clkin";
[all …]
H A Drk3588s-indiedroid-nova.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/usb/pd.h>
22 stdout-path = "serial2:1500000n8";
25 sdio_pwrseq: sdio-pwrseq {
26 compatible = "mmc-pwrseq-simple";
27 clock-names = "ext_clock";
29 pinctrl-0 = <&wifi_enable_h>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Drk3288-veyron-chromebook.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
10 #include "rk3288-veyron.dtsi"
19 gpio_keys: gpio-keys {
20 pinctrl-0 = <&pwr_key_h &ap_lid_int_l>;
23 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
25 linux,input-type = <5>; /* EV_SW */
26 debounce-interval = <1>;
27 gpio-key,wakeup;
[all …]
H A Drk3288-veyron-mickey.dts6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "rk3288-veyron-chromebook.dtsi"
50 compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7",
51 "google,veyron-mickey-rev6", "google,veyron-mickey-rev5",
52 "google,veyron-mickey-rev4", "google,veyron-mickey-rev3",
53 "google,veyron-mickey-rev2", "google,veyron-mickey-rev1",
54 "google,veyron-mickey-rev0", "google,veyron-mickey",
57 vcc_5v: vcc-5v {
58 vin-supply = <&vcc33_sys>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxbb-odroidc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-gxbb.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/sound/meson-aiu.h>
15 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
16 model = "Hardkernel ODROID-C2";
24 stdout-path = "serial0:115200n8";
32 usb_otg_pwr: regulator-usb-pwrs {
33 compatible = "regulator-fixed";
[all …]
H A Dmeson-sm1-bananapi.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-sm1.dtsi"
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
13 adc-keys {
14 compatible = "adc-keys";
15 io-channels = <&saradc 2>;
16 io-channel-names = "buttons";
17 keyup-threshold-microvolt = <1800000>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-npcm730-gbs.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
5 #include "nuvoton-npcm730.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
10 compatible = "quanta,gbs-bmc","nuvoton,npcm730";
71 stdout-path = &serial0;
78 gpio-keys {
79 compatible = "gpio-keys";
80 sas-cable0 {
81 label = "sas-cable0";
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-idp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
9 #include <dt-bindings/input/linux-event-codes.h>
15 #include "sc7280-chrome-common.dtsi"
16 #include "sc7280-herobrine-lte-sku.dtsi"
25 max98360a: audio-codec-0 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&amp_en>;
29 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
30 #sound-dai-cells = <0>;
[all …]
H A Dsdm845-db845c.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
14 #include "sdm845-wcd9340.dtsi"
21 qcom,msm-id = <341 0x20001>;
22 qcom,board-id = <8 0>;
[all …]
/openbmc/linux/arch/riscv/boot/dts/sifive/
H A Dfu740-c000.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu740-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu740-c000", "sifive,fu740";
23 #address-cells = <1>;
24 #size-cells = <0>;
28 i-cache-block-size = <64>;
29 i-cache-sets = <128>;
[all …]