ARM: dts: aspeed: mtmitchell: Add gpio line names for io expanders

Add below gpio line names to io expanders for more platform features.

- ext-vref-sel
- presence-hdd-bp5-n
- presence-hdd-bp6-n
- b

ARM: dts: aspeed: mtmitchell: Add gpio line names for io expanders

Add below gpio line names to io expanders for more platform features.

- ext-vref-sel
- presence-hdd-bp5-n
- presence-hdd-bp6-n
- bmc-ocp0-en-n
- bmc-ocp1-en-n
- bmc-riser-en-n
- gpi0, gpi1

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240905063521.319416-3-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: mtmitchell: Add I2C FAN controllers

Add the MAX31790 nodes as i2c fan controllers.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240

ARM: dts: aspeed: mtmitchell: Add I2C FAN controllers

Add the MAX31790 nodes as i2c fan controllers.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240905063521.319416-2-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: mtmitchell: Add LEDs

Add LED nodes as the gpio-leds devices. They are led-bmc-ready,
led-sw-heartbeat, led-identify, led-fault, led-fan-fault, led-psu-fault

Signed-off-by: Chanh N

ARM: dts: aspeed: mtmitchell: Add LEDs

Add LED nodes as the gpio-leds devices. They are led-bmc-ready,
led-sw-heartbeat, led-identify, led-fault, led-fan-fault, led-psu-fault

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-6-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: mtmitchell: Enable i2c10 and i2c15

Enable the BMC I2C10.
Enable the BMC I2C15 and add the GPIO Expander as a child node.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>

ARM: dts: aspeed: mtmitchell: Enable i2c10 and i2c15

Enable the BMC I2C10.
Enable the BMC I2C15 and add the GPIO Expander as a child node.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-5-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: mtmitchell: Add Riser cards

Define the I2C alias ports for the riser cards.

Add the i2c muxes to switch to the i2c alias ports and
the eeprom nodes to read the FRU contents on ris

ARM: dts: aspeed: mtmitchell: Add Riser cards

Define the I2C alias ports for the riser cards.

Add the i2c muxes to switch to the i2c alias ports and
the eeprom nodes to read the FRU contents on riser cards.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-4-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: mtmitchell: Add I2C temperature sensor alias ports

Add the I2C alias ports to read temperature sensors via channels
of the I2C muxes.

Signed-off-by: Chanh Nguyen <chanh@os.amperec

ARM: dts: aspeed: mtmitchell: Add I2C temperature sensor alias ports

Add the I2C alias ports to read temperature sensors via channels
of the I2C muxes.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-3-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: mtjade, mtmitchell: Add OCP temperature sensors

Define I2C alias ports from I2C Switch 0x70 at BMC I2C5.

Add the tmp421 sensors via the I2C alias ports as OCP device
temperature s

ARM: dts: aspeed: mtjade, mtmitchell: Add OCP temperature sensors

Define I2C alias ports from I2C Switch 0x70 at BMC I2C5.

Add the tmp421 sensors via the I2C alias ports as OCP device
temperature sensors.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-2-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: drop unused ref_voltage ADC property

Aspeed ADC "ref_voltage" property is neither documented nor used.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: ht

ARM: dts: aspeed: drop unused ref_voltage ADC property

Aspeed ADC "ref_voltage" property is neither documented nor used.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240405064624.18997-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: mtmitchell: Add I2C NVMe alias port

Adds the I2C alias ports to each NVMe drive via the
backplane card.

Besides that, it also adds the eeprom and temperature sensor
on the backpla

ARM: dts: aspeed: mtmitchell: Add I2C NVMe alias port

Adds the I2C alias ports to each NVMe drive via the
backplane card.

Besides that, it also adds the eeprom and temperature sensor
on the backplane card.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-8-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>

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ARM: dts: aspeed: mtmitchell: Remove redundant ADC configurations

Mt.Mitchell DVT and later hardware do not use adc1. It only uses
adc0 with channels 0, 1 and 2. This commit removes redundant ADC
co

ARM: dts: aspeed: mtmitchell: Remove redundant ADC configurations

Mt.Mitchell DVT and later hardware do not use adc1. It only uses
adc0 with channels 0, 1 and 2. This commit removes redundant ADC
configurations.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-7-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>

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ARM: dts: aspeed: mtmitchell: Add inlet temperature sensor

Add the inlet temperature at address 0x48, which is connected
via BMC I2C8.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Rev

ARM: dts: aspeed: mtmitchell: Add inlet temperature sensor

Add the inlet temperature at address 0x48, which is connected
via BMC I2C8.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-6-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>

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ARM: dts: aspeed: mtjade, mtmitchell: Add new gpio-line-names

Add new gpio-line-names from the Mt.Jade and Mt.Mitchell
HW schematic.

Mt.Jade
GPIOB5: presence-cpu0
GPIOF0: ps0-pgood
GPIOF1: ps

ARM: dts: aspeed: mtjade, mtmitchell: Add new gpio-line-names

Add new gpio-line-names from the Mt.Jade and Mt.Mitchell
HW schematic.

Mt.Jade
GPIOB5: presence-cpu0
GPIOF0: ps0-pgood
GPIOF1: ps1-pgood
GPIOG2: host0-shd-ack-n
GPIOH0: uart1-mode1
GPIOH1: uart2-mode1
GPIOH2: uart3-mode1
GPIOH3: uart4-mode1
GPIOH7: i2c6-reset-n
GPIOH3: host0-reboot-ack-n
GPIOM4: s0-i2c9-alert-n
GPIOM5: s1-i2c9-alert-n
GPIOQ6: led-identify
GPIOS0: s0-vr-hot-n
GPIOS1: s1-vr-hot-n
GPIOS5: vr-pmbus-sel-n
GPIOY3: bmc-vga-en-n
GPIOZ3: s0-rtc-lock
GPIOAC2: spi0-program-sel
GPIOAC3: spi0-backup-sel

Mt.Mitchell:
GPIOC3: bmc-debug-mode
GPIOE1: eth-phy-int-n
GPIOH0: jtag-program-sel
GPIOH1: fpga-program-b
GPIOW3: s1-pcp-pgood

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-3-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>

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ARM: dts: aspeed: mtjade, mtmitchell: Update gpio-line-names

Update GPIO line-name to follow naming convention specified at
github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md

Si

ARM: dts: aspeed: mtjade, mtmitchell: Update gpio-line-names

Update GPIO line-name to follow naming convention specified at
github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-2-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>

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Merge drm/drm-fixes into drm-misc-fixes

Forwarding to v6.6-rc1.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
"These are the devicetree updates for Arm and RISC-V based SoCs, main

Merge tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
"These are the devicetree updates for Arm and RISC-V based SoCs, mainly
from Qualcomm, NXP/Freescale, Aspeed, TI, Rockchips, Samsung, ST and
Starfive.

Only a few new SoC got added:

- TI AM62P5, a variant of the existing Sitara AM62x family

- Intel Agilex5, an FPGFA platform that includes an Cortex-A76/A55
SoC.

- Qualcomm ipq5018 is used in wireless access points

- Qualcomm SM4450 (Snapdragon 4 Gen 2) is a new low-end mobile phone
platform.

In total, 29 machines get added, which is low because of the summer
break. These cover SoCs from Aspeed, Broadcom, NXP, Samsung, ST,
Allwinner, Amlogic, Intel, Qualcomm, Rockchip, TI and T-Head. Most of
these are development and reference boards.

Despite not adding a lot of new machines, there are over 700 patches
in total, most of which are cleanups and minor fixes"

* tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (735 commits)
arm64: dts: use capital "OR" for multiple licenses in SPDX
ARM: dts: use capital "OR" for multiple licenses in SPDX
arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved
ARM: dts: qcom: apq8064: add support to gsbi4 uart
riscv: dts: change TH1520 files to dual license
riscv: dts: thead: add BeagleV Ahead board device tree
dt-bindings: riscv: Add BeagleV Ahead board compatibles
ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board
ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators
dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
ARM: dts: stm32: support display on stm32f746-disco board
ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
ARM: dts: stm32: add pin map for LTDC on stm32f7
ARM: dts: stm32: add ltdc support on stm32f746 MCU
arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sdm670: Add PDC
riscv: dts: starfive: fix jh7110 qspi sort order
...

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Merge tag 'aspeed-6.6-devicetree-2' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into soc/dt

ASPEED device tree updates for 6.6

- New machines

* Inventec's Starscream AST2600 BMC,

Merge tag 'aspeed-6.6-devicetree-2' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into soc/dt

ASPEED device tree updates for 6.6

- New machines

* Inventec's Starscream AST2600 BMC, for a x86 server platform
* Meta's Yossemite 4 AST2600 BMC, for a multi-node server platform

- Big device tree rework for IBM's Power10 BMC platforms

- Updates for wedge400 and Mt Mitchell

- AST2600 I3C and VUART descriptions

* tag 'aspeed-6.6-devicetree-2' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
ARM: dts: aspeed: Add AST2600 I3C control pins
ARM: dts: aspeed: everest: Move common devices up
ARM: dts: aspeed: everest: Reorganise FSI description
ARM: dts: aspeed: rainier: Reorganise FSI description
ARM: dts: aspeed: bonnell: Reorganise FSI description
ARM: dts: aspeed: Add P10 FSI descriptions
ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMC
dt-bindings: arm: aspeed: add Facebook Yosemite 4 board
ARM: dts: aspeed: wedge400: Set eMMC max frequency
ARM: dts: aspeed: wedge400: Enable more ADC channels
ARM: dts: aspeed: Update spi alias in Facebook AST2500 Common dtsi
ARM: dts: aspeed: rainier: Remove TPM device
ARM: dts: aspeed: Add AST2600 VUARTs
ARM: dts: aspeed: mtmitchell: Add MCTP
ARM: dts: aspeed: mtmitchell: Update ADC sensors for Mt.Mitchell DVT systems
ARM: dts: aspeed: mtmitchell: Enable the BMC UART8 and UART9
ARM: dts: aspeed: Adding Inventec Starscream BMC
dt-bindings: arm: aspeed: add Inventec starscream-bmc
ARM: dts: aspeed: bonnell: Add DIMM SPD

Link: https://lore.kernel.org/r/CACPK8Xc76O5kLEAXRtbFXZcP=ObrKR0Kpez_er+zV2vZffZe7A@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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ARM: dts: aspeed: mtmitchell: Add MCTP

Enable MCTP driver on I2C3 bus for MCTP transaction

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20230620092537.

ARM: dts: aspeed: mtmitchell: Add MCTP

Enable MCTP driver on I2C3 bus for MCTP transaction

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20230620092537.20007-4-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>

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ARM: dts: aspeed: mtmitchell: Update ADC sensors for Mt.Mitchell DVT systems

Change to use I2C ADC controller (ltc2497) for Mt.Mitchell DVT and
later hardware.

Signed-off-by: Chanh Nguyen <chanh@os

ARM: dts: aspeed: mtmitchell: Update ADC sensors for Mt.Mitchell DVT systems

Change to use I2C ADC controller (ltc2497) for Mt.Mitchell DVT and
later hardware.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20230620092537.20007-3-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>

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ARM: dts: aspeed: mtmitchell: Enable the BMC UART8 and UART9

The BMC UART8 and UART9 were connected to the Secpro and Mpro console
of socket S1 on the Mt.Mitchell system.

Signed-off-by: Chanh Nguye

ARM: dts: aspeed: mtmitchell: Enable the BMC UART8 and UART9

The BMC UART8 and UART9 were connected to the Secpro and Mpro console
of socket S1 on the Mt.Mitchell system.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20230620092537.20007-2-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>

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Merge drm/drm-next into drm-intel-next

Catching-up with drm-next and drm-intel-gt-next.
It will unblock a code refactor around the platform
definitions (names vs acronyms).

Signed-off-by: Rodrigo V

Merge drm/drm-next into drm-intel-next

Catching-up with drm-next and drm-intel-gt-next.
It will unblock a code refactor around the platform
definitions (names vs acronyms).

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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Merge drm/drm-next into drm-intel-gt-next

Need to pull in b3e4aae612ec ("drm/i915/hdcp: Modify hdcp_gsc_message msg sending mechanism") as
a dependency for https://patchwork.freedesktop.org/series/1

Merge drm/drm-next into drm-intel-gt-next

Need to pull in b3e4aae612ec ("drm/i915/hdcp: Modify hdcp_gsc_message msg sending mechanism") as
a dependency for https://patchwork.freedesktop.org/series/121735/

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

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Merge drm/drm-next into drm-misc-next

Backmerging to get v6.5-rc2.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

ASoC: Merge v6.5-rc2

Get a similar baseline to my other branches, and fixes for people using
the branch.

Merge v6.5-rc1 into drm-misc-fixes

Boris needs 6.5-rc1 in drm-misc-fixes to prevent a conflict.

Signed-off-by: Maxime Ripard <mripard@kernel.org>

Merge branch 'master' into mm-hotfixes-stable