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/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dfsl,lcdif.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/fsl,lcdif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale/NXP i.MX LCD Interface (LCDIF)
10 - Marek Vasut <marex@denx.de>
11 - Stefan Agner <stefan@agner.ch>
14 (e)LCDIF display controller found in the Freescale/NXP i.MX SoCs.
19 - enum:
20 - fsl,imx23-lcdif
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx8mm-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mm-disp-blk-ctrl
21 - const: syscon
26 '#power-domain-cells':
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H A Dfsl,imx8mn-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MN DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mn-disp-blk-ctrl
21 - const: syscon
26 '#power-domain-cells':
[all …]
/openbmc/linux/drivers/clk/mxs/
H A Dclk-imx23.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <linux/clk-provider.h>
27 #define PIX (CLKCTRL + 0x0060) macro
86 lcdif, etm, usb, usb_phy, enumerator
102 dcnp = of_find_compatible_node(NULL, NULL, "fsl,imx23-digctl"); in mx23_clocks_init()
129 clks[lcdif_div] = mxs_clk_div("lcdif_div", "lcdif_sel", PIX, 0, 12, 29); in mx23_clocks_init()
150 clks[lcdif] = mxs_clk_gate("lcdif", "lcdif_div", PIX, 31); in mx23_clocks_init()
170 CLK_OF_DECLARE(imx23_clkctrl, "fsl,imx23-clkctrl", mx23_clocks_init);
/openbmc/linux/drivers/gpu/drm/mxsfb/
H A Dlcdif_drv.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/dma-mapping.h>
47 static int lcdif_attach_bridge(struct lcdif_drm_private *lcdif) in lcdif_attach_bridge() argument
49 struct device *dev = lcdif->drm->dev; in lcdif_attach_bridge()
54 for_each_endpoint_of_node(dev->of_node, ep) { in lcdif_attach_bridge()
73 bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, of_ep.id); in lcdif_attach_bridge()
86 return -ENOMEM; in lcdif_attach_bridge()
89 encoder->possible_crtcs = drm_crtc_mask(&lcdif->crtc); in lcdif_attach_bridge()
90 ret = drm_encoder_init(lcdif->drm, encoder, &lcdif_encoder_funcs, in lcdif_attach_bridge()
114 struct lcdif_drm_private *lcdif = drm->dev_private; in lcdif_irq_handler() local
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/openbmc/linux/drivers/pmdomain/imx/
H A Dimx8m-blk-ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
19 #include <dt-bindings/power/imx8mm-power.h>
20 #include <dt-bindings/power/imx8mn-power.h>
21 #include <dt-bindings/power/imx8mp-power.h>
22 #include <dt-bindings/power/imx8mq-power.h>
53 * an if-statement should be used before setting and clearing this
88 const struct imx8m_blk_ctrl_domain_data *data = domain->data; in imx8m_blk_ctrl_power_on()
89 struct imx8m_blk_ctrl *bc = domain->bc; in imx8m_blk_ctrl_power_on()
93 ret = pm_runtime_get_sync(bc->bus_power_dev); in imx8m_blk_ctrl_power_on()
95 pm_runtime_put_noidle(bc->bus_power_dev); in imx8m_blk_ctrl_power_on()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dfsl-imx8mq.dtsi16 #include "fsl-imx8-ca53.dtsi"
17 #include <dt-bindings/clock/imx8mq-clock.h>
18 #include <dt-bindings/gpio/gpio.h>
19 #include <dt-bindings/input/input.h>
20 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #include <dt-bindings/pinctrl/pins-imx8mq.h>
22 #include <dt-bindings/thermal/thermal.h>
26 interrupt-parent = <&gpc>;
27 #address-cells = <2>;
28 #size-cells = <2>;
[all …]
H A Dimx7ulp.dtsi2 * Copyright 2015-2016 Freescale Semiconductor, Inc.
9 #include <dt-bindings/clock/imx7ulp-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx7ulp-pinfunc.h"
16 interrupt-parent = <&intc>;
37 #address-cells = <1>;
38 #size-cells = <0>;
41 compatible = "arm,cortex-a7";
47 reserved-memory {
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H A Dimx6sx.dtsi9 #include <dt-bindings/clock/imx6sx-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "imx6sx-pinfunc.h"
55 #address-cells = <1>;
56 #size-cells = <0>;
59 compatible = "arm,cortex-a9";
62 next-level-cache = <&L2>;
63 operating-points = <
[all …]
H A Dimx6sll.dtsi9 #include <dt-bindings/clock/imx6sll-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx6sll-pinfunc.h"
43 #address-cells = <1>;
44 #size-cells = <0>;
47 compatible = "arm,cortex-a9";
50 next-level-cache = <&L2>;
51 operating-points = <
58 fsl,soc-operating-points = <
[all …]
H A Dimx6ul.dtsi9 #include <dt-bindings/clock/imx6ul-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "imx6ul-pinfunc.h"
54 #address-cells = <1>;
55 #size-cells = <0>;
58 compatible = "arm,cortex-a7";
61 clock-latency = <61036>; /* two CLK32 periods */
62 operating-points = <
[all …]
H A Dimx6sl.dtsi10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include "imx6sl-pinfunc.h"
12 #include <dt-bindings/clock/imx6sl-clock.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
19 * pre-existing /chosen node to be available to insert the
21 * Also for U-Boot there must be a pre-existing /memory node.
47 #address-cells = <1>;
48 #size-cells = <0>;
51 compatible = "arm,cortex-a9";
[all …]
H A Dimx7s.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/clock/imx7d-clock.h>
45 #include <dt-bindings/power/imx7-power.h>
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/input/input.h>
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include "imx7d-pinfunc.h"
52 #address-cells = <1>;
53 #size-cells = <1>;
56 * pre-existing /chosen node to be available to insert the
[all …]
H A Dimx6ull.dtsi2 * Copyright 2015-2016 Freescale Semiconductor, Inc.
9 #include <dt-bindings/clock/imx6ul-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "imx6ull-pinfunc.h"
14 #include "imx6ull-pinfunc-snvs.h"
52 #address-cells = <1>;
53 #size-cells = <0>;
56 compatible = "arm,cortex-a7";
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
H A Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/imx8mm-power.h>
11 #include <dt-bindings/reset/imx8mq-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mm-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
H A Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
[all …]
H A Dimx8mq.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 #include <dt-bindings/clock/imx8mq-clock.h>
8 #include <dt-bindings/power/imx8mq-power.h>
9 #include <dt-bindings/reset/imx8mq-reset.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include "dt-bindings/input/input.h"
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interconnect/imx8mq.h>
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6sx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6sx-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6sx-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
60 #address-cells = <1>;
[all …]
H A Dimx6sll.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright 2017-2018 NXP.
8 #include <dt-bindings/clock/imx6sll-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx6sll-pinfunc.h"
14 #address-cells = <1>;
15 #size-cells = <1>;
46 #address-cells = <1>;
47 #size-cells = <0>;
[all …]
H A Dimx6sl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6sl-pinfunc.h"
7 #include <dt-bindings/clock/imx6sl-clock.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 * pre-existing /chosen node to be available to insert the
50 #address-cells = <1>;
51 #size-cells = <0>;
54 compatible = "arm,cortex-a9";
[all …]
H A Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
[all …]
H A Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
[all …]
/openbmc/u-boot/arch/arm/mach-imx/mx6/
H A Dclock.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
10 #include <asm/arch/imx-regs.h>
31 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
36 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
44 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
52 clrbits_le32(&imx_ccm->CCGR4, MXC_CCM_CCGR4_QSPI2_ENFC_MASK); in setup_gpmi_io_clk()
54 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
60 setbits_le32(&imx_ccm->CCGR4, MXC_CCM_CCGR4_QSPI2_ENFC_MASK); in setup_gpmi_io_clk()
62 clrbits_le32(&imx_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_io_clk()
[all …]
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx6sl.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
14 #include <dt-bindings/clock/imx6sl-clock.h>
123 * 396MHz -> 132MHz;
124 * 792MHz -> 158.4MHz;
125 * 996MHz -> 142.3MHz;
193 clk_hw_data->num = IMX6SL_CLK_END; in imx6sl_clocks_init()
194 hws = clk_hw_data->hws; in imx6sl_clocks_init()
202 np = of_find_compatible_node(NULL, NULL, "fsl,imx6sl-anatop"); in imx6sl_clocks_init()
234 clk_set_parent(hws[IMX6SL_PLL1_BYPASS]->clk, hws[IMX6SL_CLK_PLL1]->clk); in imx6sl_clocks_init()
[all …]